Implementing an adaptive viterbi algorithm in coarse-grained reconfigurable hardware

Proceedings of the 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'05

Volumn , Issue , 2005, Pages 62-68

  Rauwerda, Gerard K ^a   Smit, Gerard J M ^b  

^a UNIVERSITY OF TWENTE   (Netherlands)

^b Atmel Germany GmbH   (Germany)

Author keywords

Coarse grained reconfigurable hardware; Montium; System on chip; Viterbi

Indexed keywords

ADAPTIVE ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMMUNICATION SYSTEMS; DECODING; ELECTRIC LOAD FORECASTING; INTEGRATED CIRCUITS; PROGRAMMABLE LOGIC CONTROLLERS;

ADAPTIVE VITERBI ALGORITHMS; ADAPTIVE VITERBI DECODERS; BASE-BAND PROCESSING; COARSE-GRAINED RECONFIGURABLE ARCHITECTURES; COARSE-GRAINED RECONFIGURABLE HARDWARE; CONSTRAINT LENGTHS; ENERGY CONSUMPTION; ERROR DECODING; ESTIMATED COSTS; MOBILE TERMINALS; MONTIUM; MULTI-MODE COMMUNICATIONS; SYSTEM-ON-CHIP; VITERBI;

VITERBI ALGORITHM;

EID: 60749101456     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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