A SRAM-based architecture for trie-based IP lookup using FPGA

Proceedings of the 16th IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM'08

Volumn , Issue , 2008, Pages 33-42

  Le, Hoang ^a   Jiang, Weirong ^a   Prasanna, Viktor K ^a  

^a University of Southern California   (United States)

Author keywords

Field Programmable Gate Array (FPGA); IP Address Lookup; Longest Prefix Matching; Reconfigurable Hardware

Indexed keywords

COMPUTERS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTERNET; LOGIC GATES; NETWORK ARCHITECTURE; OPTICAL SENSORS; PIPELINES; ROUTERS; SEARCH ENGINES; STATIC RANDOM ACCESS STORAGE; TERMINOLOGY;

FIELD PROGRAMMABLE GATE ARRAY (FPGA); HIGH THROUGHPUTS; INCOMING PACKETS; INTERNET TRAFFICS; IP ADDRESS LOOKUP; IP LOOKUPS; IP ROUTERS; LINEAR PIPELINES; LONGEST PREFIX MATCHING; LOOKUPS; MEMORY ALLOCATIONS; PIPELINED SOLUTIONS; RECONFIGURABLE HARDWARE; ROUTE UPDATES; TREE TRAVERSALS; TREE-BASED;

INTERNET PROTOCOLS;

EID: 60349097630     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2008.9     Document Type: Conference Paper

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