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Volumn 55, Issue 11, 2008, Pages 3438-3447

Conflict-free parallel memory accessing techniques for FFT architectures

Author keywords

Fast Fourier transform (FFT); Parallel architectures; Signal processing

Indexed keywords

FAST FOURIER TRANSFORMS; INTERACTIVE COMPUTER SYSTEMS; MEMORY ARCHITECTURE; REAL TIME SYSTEMS; SIGNAL PROCESSING; TABLE LOOKUP;

EID: 58049211396     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2008.924889     Document Type: Article
Times cited : (43)

References (15)
  • 1
    • 84968470212 scopus 로고
    • An algorithm for the machine calculation of complex Fourier series
    • Apr
    • J. W. Cooley and J. W. Tukey, "An algorithm for the machine calculation of complex Fourier series," Math. Comput., vol. 19, no. 90, pp. 297-301, Apr. 1965.
    • (1965) Math. Comput , vol.19 , Issue.90 , pp. 297-301
    • Cooley, J.W.1    Tukey, J.W.2
  • 4
    • 0033101737 scopus 로고    scopus 로고
    • An effective memory addressing scheme for FFT processors
    • Mar
    • Y. Ma, "An effective memory addressing scheme for FFT processors," IEEE Trans. Signal Process., vol. 47, no. 3, pp. 907-911, Mar. 1999.
    • (1999) IEEE Trans. Signal Process , vol.47 , Issue.3 , pp. 907-911
    • Ma, Y.1
  • 5
    • 0033904240 scopus 로고    scopus 로고
    • A hardware efficient control of memory addressing for high-performance FFT processors
    • Mar
    • Y. Ma and L. Wanhammar, "A hardware efficient control of memory addressing for high-performance FFT processors," IEEE Trans. Signal Process., vol. 48, no. 3, pp. 917-921, Mar. 2000.
    • (2000) IEEE Trans. Signal Process , vol.48 , Issue.3 , pp. 917-921
    • Ma, Y.1    Wanhammar, L.2
  • 6
    • 84941861198 scopus 로고
    • Fourier transforms in VLSI
    • Nov
    • C. D. Thompson, "Fourier transforms in VLSI," IEEE Trans. Comput. vol. C-32, no. 11, pp. 1047-1057, Nov. 1983.
    • (1983) IEEE Trans. Comput , vol.C-32 , Issue.11 , pp. 1047-1057
    • Thompson, C.D.1
  • 7
    • 0021422119 scopus 로고
    • Pipeline and parallel-pipeline FFT processors for VLSI implementations
    • May
    • E. H. Wold and A. M. Despain, "Pipeline and parallel-pipeline FFT processors for VLSI implementations," IEEE Trans. Comput., vol. C-33, no. 5, pp. 414-426, May 1984.
    • (1984) IEEE Trans. Comput , vol.C-33 , Issue.5 , pp. 414-426
    • Wold, E.H.1    Despain, A.M.2
  • 8
    • 0031633013 scopus 로고    scopus 로고
    • Design and implementation of a 1024-point pipeline FFT processor
    • S. He and M. Torkelson, "Design and implementation of a 1024-point pipeline FFT processor," in Proc. IEEE Custom Integr. Circuits Conf. 1998, pp. 131-134.
    • (1998) Proc. IEEE Custom Integr. Circuits Conf , pp. 131-134
    • He, S.1    Torkelson, M.2
  • 9
    • 0029710702 scopus 로고    scopus 로고
    • A new approach to pipeline FFT processor
    • S. He and M. Torkelson, "A new approach to pipeline FFT processor," in Proc. IPPS, 1996, pp. 766-770.
    • (1996) Proc. IPPS , pp. 766-770
    • He, S.1    Torkelson, M.2
  • 12
    • 0025782109 scopus 로고
    • Block, multistride vector, and FFT accesses in parallel memory systems
    • Jan
    • D. Harper, "Block, multistride vector, and FFT accesses in parallel memory systems," IEEE Trans. Parallel Distrib. Syst., vol. 2, no. 1, pp. 43-51, Jan. 1991.
    • (1991) IEEE Trans. Parallel Distrib. Syst , vol.2 , Issue.1 , pp. 43-51
    • Harper, D.1
  • 13
    • 0026257566 scopus 로고
    • Fast computation of real discrete Fourier transform for any number of data points
    • Nov
    • N. Hu and O. Ersoy, "Fast computation of real discrete Fourier transform for any number of data points," IEEE Trans. Circuits Syst. vol. 38, no. 11, pp. 1280-1292, Nov. 1991.
    • (1991) IEEE Trans. Circuits Syst , vol.38 , Issue.11 , pp. 1280-1292
    • Hu, N.1    Ersoy, O.2
  • 14
    • 20144374051 scopus 로고    scopus 로고
    • New continuous-flow mixed radix (CFMR) FFT processor using novel in-place strategy
    • May
    • B. Go and M. Sunwoo, "New continuous-flow mixed radix (CFMR) FFT processor using novel in-place strategy," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 5, pp. 911-919, May 2005.
    • (2005) IEEE Trans. Circuits Syst. I, Reg. Papers , vol.52 , Issue.5 , pp. 911-919
    • Go, B.1    Sunwoo, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.