-
4
-
-
35048900689
-
Symbolic model checking: 1020 states and beyond
-
J. R. Burch, E. M. Clarke, K. L. McMillan, D. L. Dill, and L. J. Hwang. Symbolic model checking: 1020 states and beyond. Information and Computation, 98(2), 1992.
-
(1992)
Information and Computation
, vol.98
, Issue.2
-
-
Burch, J.R.1
Clarke, E.M.2
McMillan, K.L.3
Dill, D.L.4
Hwang, L.J.5
-
5
-
-
34547282756
-
Reducing verification complexity of a multicore coherence protocol using assume/guarantee
-
X. Chen, Y. Yang, G. Gopalakrishnan, and C.-T. Chou. Reducing verification complexity of a multicore coherence protocol using assume/guarantee. In FMCAD '06: Proceedings of the Formal Methods in Computer Aided Design, pages 81-88, 2006.
-
(2006)
FMCAD '06: Proceedings of the Formal Methods in Computer Aided Design
, pp. 81-88
-
-
Chen, X.1
Yang, Y.2
Gopalakrishnan, G.3
Chou, C.-T.4
-
8
-
-
0001801746
-
Protocol verification as a hardware design aid
-
D. L. Dill, A. J. Drexler, A. J. Hu, and C. H. Yang. Protocol verification as a hardware design aid. In IEEE International Conference on Computer Design: VLSI in Computers and Processors, pages 522-525, 1992.
-
(1992)
IEEE International Conference on Computer Design: VLSI in Computers and Processors
, pp. 522-525
-
-
Dill, D.L.1
Drexler, A.J.2
Hu, A.J.3
Yang, C.H.4
-
12
-
-
0034911369
-
Well structured transition systems everywhere!
-
A. Finkel and P. Schnoebelen. Well structured transition systems everywhere! Theoretical Computer Science, 256(1-2):63-92, 2001.
-
(2001)
Theoretical Computer Science
, vol.256
, Issue.1-2
, pp. 63-92
-
-
Finkel, A.1
Schnoebelen, P.2
-
15
-
-
58049134882
-
Parameterized system verification with guard strengthening and parameter abstraction
-
S. Krstić. Parameterized system verification with guard strengthening and parameter abstraction. In Automated Verification of Infinite-State Systems, 2005.
-
(2005)
Automated Verification of Infinite-State Systems
-
-
Krstić, S.1
-
16
-
-
0028343484
-
The stanford FLASH multiprocessor
-
J. Kuskin, D. Ofelt, M. Heinrich, J. Heinlein, R. Simoni, K. Gharachorloo, J. Chapin, D. Nakahira, J. Baxter, M. Horowitz, A. Gupta, M. Rosenblum, and J. Hennessy. The stanford FLASH multiprocessor. In 21st Annual International Symposium on Computer Architecture (ISCA), pages 302-313, 1994.
-
(1994)
21st Annual International Symposium on Computer Architecture (ISCA)
, pp. 302-313
-
-
Kuskin, J.1
Ofelt, D.2
Heinrich, M.3
Heinlein, J.4
Simoni, R.5
Gharachorloo, K.6
Chapin, J.7
Nakahira, D.8
Baxter, J.9
Horowitz, M.10
Gupta, A.11
Rosenblum, M.12
Hennessy, J.13
-
18
-
-
35248841024
-
Mechanized proofs for the parameter abstraction and guard strengthening principle in parameterized verification of cache coherence protocols
-
Y. Li. Mechanized proofs for the parameter abstraction and guard strengthening principle in parameterized verification of cache coherence protocols. In SAC '07: Proceedings of the 2007 ACM symposium on Applied computing, pages 1534-1535, 2007.
-
(2007)
SAC '07: Proceedings of the 2007 ACM symposium on Applied computing
, pp. 1534-1535
-
-
Li, Y.1
-
21
-
-
84947280188
-
Parameterized verification of the FLASH cache coherence protocol by compositional model checking
-
K. L. McMillan. Parameterized verification of the FLASH cache coherence protocol by compositional model checking. In Correct Hardware Design and Verification Methods (CHARME), pages 179-195, 2001.
-
(2001)
Correct Hardware Design and Verification Methods (CHARME)
, pp. 179-195
-
-
McMillan, K.L.1
-
22
-
-
33646421632
-
Counterexample guided invariant discovery for parameterized cache coherence verification
-
S. Pandav, K. Slind, and G. Gopalakrishnan. Counterexample guided invariant discovery for parameterized cache coherence verification. In CHARME, pages 317-331, 2005.
-
(2005)
CHARME
, pp. 317-331
-
-
Pandav, S.1
Slind, K.2
Gopalakrishnan, G.3
-
24
-
-
0034262433
-
Formal automatic verification of cache coherence in multiprocessors with relaxed memory models
-
September
-
F. Pong and M. Dubois. Formal automatic verification of cache coherence in multiprocessors with relaxed memory models. IEEE Transactions on Parallel and Distributed Systems, 11(9):989-1006, September 2000.
-
(2000)
IEEE Transactions on Parallel and Distributed Systems
, vol.11
, Issue.9
, pp. 989-1006
-
-
Pong, F.1
Dubois, M.2
-
26
-
-
27644588866
-
An industrially effective environment for formal hardware verification
-
September
-
C.-J. H. Seger, R. B. Jones, J. W. O'Leary, T. Melham, M. D. Aagaard, C. Barrett, and D. Syme. An industrially effective environment for formal hardware verification. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 24(9):1381-1405, September 2005.
-
(2005)
IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems
, vol.24
, Issue.9
, pp. 1381-1405
-
-
Seger, C.-J.H.1
Jones, R.B.2
O'Leary, J.W.3
Melham, T.4
Aagaard, M.D.5
Barrett, C.6
Syme, D.7
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