Reconfigurable architecture for LDPC and turbo decoding: A NoC case study

IEEE International Symposium on Spread Spectrum Techniques and Applications

Volumn , Issue , 2008, Pages 671-676

  Scarpellino, Michelangelo ^a   Singh, Ashwani ^a,b   Boutillon, Emmanuel ^b   Masera, Guido ^a  

^a POLITECNICO DI TORINO   (Italy)

^b UNIVERSITÉ EUROPÉENNE DE BRETAGNE   (France)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATIONS; CELLULAR TELEPHONE SYSTEMS; COMMUNICATION SYSTEMS; COMPUTER ARCHITECTURE; DATA COMPRESSION; ELECTRIC NETWORK TOPOLOGY; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; MOBILE COMPUTING; SEMICONDUCTOR QUANTUM DOTS; SPECTRUM ANALYSIS; TOPOLOGY; WIRELESS NETWORKS;

BASEBAND PROCESSING; CASE STUDIES; CHANNEL DECODING; COMMUNICATION CENTRIC; EFFICIENT IMPLEMENTATIONS; EVALUATION RESULTS; IEEE 802.16E; INTERCONNECT TOPOLOGIES; LDPC DECODING; MODE SYSTEMS; NETWORK LATENCIES; NETWORK SIZES; PROCESSOR ARCHITECTURES; RECONFIGURABLE ARCHITECTURES; RECONFIGURABLE PROCESSING; TURBO DECODING; WIRELESS COMMUNICATION SYSTEMS;

DECODING;

EID: 57849167109     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSSTA.2008.131     Document Type: Conference Paper

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