Amorphous silicon logic circuits on flexible substrates

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2008, Pages 181-184

  Shringarpure, Rahul ^a   Clark, Lawrence T ^a   Venugopal, Sameer M ^a   Allee, David R ^a   Uppili, Shrinivas G ^a  

^a NONE

Author keywords

a Si:H TFT; Combinational logic; Flexible electronics; Threshold voltage degradation

Indexed keywords

AMORPHOUS SILICON; DEGRADATION; DELAY CIRCUITS; INTEGRATED CIRCUITS; LOGIC DESIGN; SEMICONDUCTING SILICON COMPOUNDS; SILICON; SWITCHING CIRCUITS; SWITCHING THEORY; THIN FILM DEVICES; THIN FILM TRANSISTORS; THRESHOLD VOLTAGE; TRANSISTORS;

A-SI:H TFT; BASE-LINES; COMBINATIONAL LOGIC; DESIGN APPROACHES; DYNAMIC CIRCUITS; FLEXIBLE ELECTRONICS; FLEXIBLE SUBSTRATES; LOW TEMPERATURES; SI:H THIN FILM TRANSISTORS; SIMULATED RESULTS; STATIC AND DYNAMICS; THRESHOLD VOLTAGE DEGRADATION;

LOGIC CIRCUITS;

EID: 57849146131     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2008.4672053     Document Type: Conference Paper

References (8)

1. G. Raupp, et. al, "Low-temperature amorphous-silicon backplane technology development for flexible displays in a manufacturing pilot-line environment," J. Society of Information Displays, 15(7), pp. 445-454, July 2007.
2. S. Venugopal, and D. Allee, "Integrated a-Si:H source drivers for 4" QVGA electrophoretic display on flexible stainless steel substrate," IEEE Journal of Display Technology, 3(1), pp. 57-63, March 2007.
3. K. Wissmiller, et, al, "Reducing Power in Flexible a-Si Digital Circuits While Preserving State," Proc. CICC, 2005, pp. 21.9-222, 2005.
4. J. Uyemura, CMOS Logic Circuit Design, Kluwer Academic Publisher, Norwell, MA, pp. 319-324, 1999.
5. N. Weste, and D. Harris, CMOS VLSI Design: a circuits and systems perspective, Pearson/Addison-Wesley, Boston, pp. 750-756, 2004.
6. G. Samson, and L. Clark, "A 0.13 μm Race-free Low-power Programmable Logic Array," Proc. CICC, pp. 313-316, 2006.
7. H. Lebrun, T. Kretz, J. Magarino, and N. Szydlo, "Design of Integrated Drivers with a-Si TFTs for Small Displays: Basic Concepts," J. Society for Information Display,. 36(2), pp. 950-953, 2005.
8. R. Shringarpure, et al, "Localization of gate biased induced threshold voltage degradation in a-Si:H TFT's", IEEE Elec. Dev. Lett., 29(1), pp. 93-95, Jan. 2008.