Atomically flat gate insulator/silicon (100) interface formation introducing high mobility, ultra-low noise, and small characteristics variation CMOSFET

ESSDERC 2008 - Proceedings of the 38th European Solid-State Device Research Conference

Volumn , Issue , 2008, Pages 83-86

  Kuroda, R ^a   Teramoto, A ^a   Suwa, T ^a   Hasebe, R ^a   Li, X ^a   Konda, M ^a   Sugawa, S ^a   Ohmi, T ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ARGON; INERT GASES; OXYGEN; REACTION KINETICS; SEMICONDUCTING SILICON COMPOUNDS; SILICON WAFERS; SOIL CONSERVATION;

1/F NOISES; ATOMIC TERRACES; CMOSFET; CMOSFETS; CONVENTIONAL TECHNOLOGIES; ELECTRICAL VARIATIONS; FLAT INTERFACES; GATE INSULATORS; HIGH MOBILITIES; INTERFACE FORMATIONS; LARGE DIAMETERS; LOW NOISES; LOW TEMPERATURES; MOBILITY CHARACTERISTICS; OXYGEN RADICALS; RADICAL REACTIONS; SILICON SURFACES; TILT ANGLES;

CRYSTAL ORIENTATION;

EID: 56749180185     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2008.4681704     Document Type: Conference Paper

References (10)

1. 2 interface microroughness," IEEE Elec. Dev. Lett., vol.12, no. 12, pp.652-654, 1991.
2. T.Yamanaka, S.J.Fang, H.C.Lin, J.P.Snyder, and C.R.Helms, "Correlation between inversion layer mobility and surface roughness measured by AFM," IEEE Elec. Dev. Lett., vol.17, pp. 178-180, 1996.
3. K.T anaka, K.Watanabe, H.Ishino, S.Sugawa, A.Teramoto, M.Hirayama, and T.Ohmi, "A technology for reducing Flicker noise for ULSI applications," Jpn. J. Appl. Phys., vol.42, pp.2106-2109, 2003.
4. P.Gaubert, ATeramoto, T.Hamada, M.Yamamoto, K.Kotani, and T.Ohmi, "1/f noise suppression of pMOSFETs fabricated on Si(100) and Si(110) using an alkali-free cleaning process," IEEE T-ED., vol.53, pp.851-856, 2006.
5. T.Ohmi, ATeramoto, R.Kuroda, and N.Miyamoto, "Revolutional progress of silicon technologies exhibiting very high speed performance over a 50-GHz clock rate," IEEE T-ED., vol.54, pp.1471-1477, 2007.
6. K.R.Lakshmikumar, R.AHadaway, and MACopeland, "Characterization and modeling of mismatch in MOS transistors for precision analog design,"IEEE J. SSC., vol.SC-21, pp.1057-1066, 1986.
7. X.Wang, P.R.Rao, AMierop, and AJ.P.Theuwissen, "Random telegraph signal in CMOS image sensor pixels," IEDM Tech. Dig., pp.115-118, 2006.
8. T.Ohmi, M.Hirayama, and ATeramoto, "New era of silicon technologies due to radical reaction based semiconductor manufacturing," J. Phys., D, Appl. Phys. vol.39, pp.Rl-R17, 2006.
9. Y.Matsushita, M.Hirasawa, H.Naahama, and R.Takeda, "Precise control of annealed wafers for nanometer devices," ECS Trans., vol.3, pp.159-168, 2006.
10. S.Takagi, AToriumi, M.Iwase, and H.Tango, "On the universatity of inversion-layer mobility in Si MOSFET's (Partll) Effect of substrate impurity concentration," IEEE T-ED., vol. 41, pp.2357-2362, 1994.