Low-latency high-bandwidth HW/SW communication in a virtual memory environment

Proceedings - 2008 International Conference on Field Programmable Logic and Applications, FPL

Volumn , Issue , 2008, Pages 281-286

  Lange, Holger ^a   Koch, Andreas ^a  

^a DARMSTADT UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED LOGIC DESIGN; REAL TIME SYSTEMS;

ADAPTIVE; HARDWARE/SOFTWARE PARTITIONING; HIGH-PERFORMANCE; MAIN MEMORIES; PROCESSING ELEMENTS; PROGRAMMABLE PROCESSORS; RECONFIGURABLE COMPUTES; VIRTUAL MEMORIES;

DATA STORAGE EQUIPMENT;

EID: 54949110596     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2008.4629945     Document Type: Conference Paper

References (19)

1. Gokhale M., Graham P.S., "Reconfigurable Computing", Springer, 2005
2. Budiu M., Venkatarami G., et al., "Spatial Computation", Proc. Intl. ACM Conf. on ASPLOS, 2004
3. Vuletié M., Pozzi L., Ienne P., "Virtual Memory Window for Application-Specific Reconfigurable Coprocessors", Proc. Design Automation Conference (DAC), San Diego, 2004
4. Callahan T., Hauser J., Wawrzynek J., "The Garp Architecture and C Compiler", IEEE Computer. 04/2000
5. MacMillen D., "Nimble Compiler Environment for Agile Hardware", Storming Media LLC (USA), 2001
6. Kasprzyk N., Koch A., "High-Level-Language Compilation for Reconfigurable Computers", Proc. Intl. Conf. on Reconfigurable Communication-centric SoCs (ReCoSoC), 2005.
7. Balacco S., "Linux in the Embedded Systems Market (Vol. VII)", Venture Development Corp, 2007
8. So H., Tkachenko A., and Brodersen R., "A Unified Hardware/Software Runtime Environment for FPGA-Based Reconfigurable Computers using BORPH", Proc. 16th Int. Conf. on Field Programmable Logic and Applications (FPL), Madrid, 2006
9. Donlin A., Lysaght P., Blodget B., and Troeger G., "A Virtual File System for Dynamically Reconfigurable FPGAs", Proc. 14th Int. Conf. on Field Programmable Logic and Applications (FPL), Antwerp, 2004
10. Nollet V., Coene P., Verkest D., Vernalde S., and Lauwereins R., "Designing an Operating System for a Heterogeneous Reconfigurable SoC". Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS), Nice, 2003
11. Laurich P., "A comparison of hard real-time Linux alternatives", Lin-uxDevices, 2004
12. IBM, "The CoreConnect Bus Architecture", White Paper, 1999
13. Xilinx, "ML310 User Guide" (UG068), 2005
14. Xilinx, "Embedded System Tools Reference Manual" (UG111). 2006
15. Xilinx, "Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Complete Data Sheet" (DS083), 2005
16. Philips Semiconductors, "SAA7146A Multimedia bridge, high performance Sealer and PCI circuit (SPCI)", Product Specification. 2004
17. Lange H., Koch A., "Design and System Level Evaluation of a High Performance Memory System for reconfigurable SoC Platforms", Proc. HiPEAC Workshop on Reconfigurable Computing, Ghent, 2007
18. Lange H., Koch A., "An Execution Model for Hardware/Software Compilation and its System-Level Realization", Proc. Intl. Conf. on Field Programmable Logic and Applications (FPL), Amsterdam, 2007
19. Kasprzyk, N., "COMRADE - Ein Hochsprachen-Compiler für Adaptive Computersysteme", Ph.D. thesis. Tech. Univ. Braunschweig, 2005