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Volumn , Issue , 2007, Pages 285-292

An execution model for hardware/software compilation and its system-level realization

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE EQUIPMENT;

EID: 48149101953     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2007.4380661     Document Type: Conference Paper
Times cited : (16)

References (21)
  • 2
    • 48149099941 scopus 로고    scopus 로고
    • Synplicity Inc
    • Synplicity Inc., "Synplify DSP", http://www.synplicity.com/ products/synplifydsp/index.html, 2007
    • (2007) Synplify DSP
  • 3
    • 77953033657 scopus 로고    scopus 로고
    • Xilinx Inc
    • Xilinx Inc., "System Generator for DSP", http://www.xilinx.com/ ise/optional_prod/system_ generator.htm, 2007
    • (2007) System Generator for DSP
  • 5
    • 48149104830 scopus 로고    scopus 로고
    • Najjar W., Böohm W., et al., From Algorithms to Hardware, IEEE Computer, 08/2005
    • Najjar W., Böohm W., et al., "From Algorithms to Hardware", IEEE Computer, 08/2005
  • 6
    • 84949813785 scopus 로고    scopus 로고
    • Stream-oriented FPGA Computing in the Streams-C High-Level Language
    • Gokhale M. B., Stone J. M., et al., "Stream-oriented FPGA Computing in the Streams-C High-Level Language", Proc. IEEE Symp. on FCCM, 2000
    • (2000) Proc. IEEE Symp. on FCCM
    • Gokhale, M.B.1    Stone, J.M.2
  • 8
    • 48149086591 scopus 로고    scopus 로고
    • Callahan T., Hauser J., Wawrzynek J., The Garp Architecture and C Compiler, IEEE Computer, 04/2000
    • Callahan T., Hauser J., Wawrzynek J., "The Garp Architecture and C Compiler", IEEE Computer, 04/2000
  • 11
    • 48149098384 scopus 로고    scopus 로고
    • Balacco S., Linux in the Embedded Systems Market (VII), Venture Development Corp, 2007
    • Balacco S., "Linux in the Embedded Systems Market (Vol.VII)", Venture Development Corp, 2007
  • 17
    • 48149110170 scopus 로고    scopus 로고
    • Embedded System Tools
    • Xilinx, "Embedded System Tools Reference Manual" (UG111), 2006
    • (2006) Reference Manual , vol.UG111
    • Xilinx1
  • 18
    • 60749087243 scopus 로고    scopus 로고
    • Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Complete
    • Xilinx, "Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Complete Data Sheet" (DS083), 2005
    • (2005) Data Sheet , vol.DS083
    • Xilinx1
  • 19
    • 48149111981 scopus 로고    scopus 로고
    • Tool Interface Standard (TIS) Executable and Linking Format (ELF) Specification Version 1.2, TIS Committee, 1995
    • Tool Interface Standard (TIS) Executable and Linking Format (ELF) Specification Version 1.2, TIS Committee, 1995
  • 20
    • 48149084316 scopus 로고    scopus 로고
    • Design and System Level Evaluation of a High Performance Memory System for reconfigurable SoC Platforms
    • Ghent
    • Lange H., Koch A., "Design and System Level Evaluation of a High Performance Memory System for reconfigurable SoC Platforms", Proc. HiPEAC Workshop on Reconfigurable Computing, Ghent, 2007
    • (2007) Proc. HiPEAC Workshop on Reconfigurable Computing
    • Lange, H.1    Koch, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.