Self-reconfigurable embedded systems on spartan-3

Proceedings - 2008 International Conference on Field Programmable Logic and Applications, FPL

Volumn , Issue , 2008, Pages 571-574

  Cantó, Enrique ^a   Fons, Francesc ^a   López, Mariano ^b  

^a UNIVERSITAT ROVIRA I VIRGILI   (Spain)

^b UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS;

CLOCK ROUTING; COPROCESSOR; DESIGN FLOWS; DESIGN TOOLS; EXTERNAL-; INTERNAL CONFIGURATION ACCESS PORTS; RECONFIGURABLE; RECONFIGURABLE EMBEDDED SYSTEMS; STREAM PROCESSING;

EMBEDDED SYSTEMS;

EID: 54949110227     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2008.4630011     Document Type: Conference Paper

References (6)

1. th Quarter 2005
2. P. Lysaht, B. Blodget, J. Mason, J. Young, B. Bridgford, "Enhanced Architectures, Design Methodologies and CAD Tools for Dynamic Reconfiguration on Xilinx FPGAs", FPL'2006, pp.12-17, Sept 2006
3. I. Gonzalez, E. Aguayo, S. López Ubedo, "Self-Reconfigurable Embedded Systems on Low-Cost FPGAs", IEEE Micro, Vol.27, Issue 4, pp.49-57, July-Aug. 2007
4. E. Cantó, M. López, F. Fons, "Reconfigurable OPB Coprocessors for a Microblaze Self-Reconfigurable SOC Mapped on Spartan-3 FPGAs", IECON'2006, pp. 3496-3501, Nov. 2006
5. nd HiPEAC Workshop on Reconfigurable Computing, January 2008
6. K. Paulsson, M. Hübner, G. Auer, M. Dreschamann, L. Chen, J. Becker, "Implementation of a Virtual Configuration Access Port (JCAP) for Enabling Partial Selft-Reconfiguration on Xilinx Spartan III FPGAs", FPL'2007, Aug. 2007