Realization of multigigabit channel equalization and crosstalk cancellation integrated circuits

IEEE Journal of Solid-State Circuits

Volumn 39, Issue 10, 2004, Pages 1659-1670

  Pelard, Cattalen ^a   Gebara, Edward ^a   Kim, Andrew J ^a   Vrazel, Michael G ^a   Bien, Franklin ^a   Hur, Youngsik ^b   Maeng, Moonkyun ^b   Chandramouli, Soumya ^b   Chun, Carl ^b   Bajekal, Sanjay ^a   Ralph, Stephen E ^b   Schmukler, Bruce ^a   Hietala, Vincent M ^a,c   Laskar, Joy ^b  

^a Quellan Inc   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^c SANDIA NATIONAL LABORATORIES   (United States)

Author keywords

Crosstalk cancellation; Equalization; Feedforward equalizer (FFE); Finite impulse response (FIR); Near end crosstalk (NEXT); Pulse amplitude modulation (PAM)

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; DATA COMMUNICATION SYSTEMS; OPTIMIZATION; PULSE MODULATION; SIGNAL PROCESSING;

CROSSTALK CANCELLATION; EQUALIZATION; FEEDFORWARD EQUALIZERS (FFE); NEAR END CROSSTALK (NEXT);

FIR FILTERS;

EID: 5444242146     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.833569     Document Type: Conference Paper

References (11)

1. S. E. Ralph, K. M. Patel, C. Argon, A. Polley, and S. W. McLaughlin, "Intelligent receivers for multimode fiber: optical and electronic equalization of differential modal delay," in Proc. LEOS, vol. 1, Nov. 2002, pp. 295-296.
2. A. J. Kim et al., "Equalization and the evolution of gigabit communications," in Proc. IEEE GaAs IC Symp., Nov. 2003, pp. 193-196.
3. H. Wu et al., "Integrated transversal equalizers in high-speed fiber-optic systems," IEEE J. Solid-State Circuits, vol. 38, pp. 2131-2137, Dec. 2003.
4. C. Pelard et al., "Multilevel signaling and equalization over multimode fiber at 10 Gb/s," in Proc. IEEE GaAs IC Symp., Nov. 2003, pp. 197-199.
5. J. T. Stonick, G.-Y. Wei, J. L. Sonntag, D. K. Weinlader, H.-J. Liaw, G.-J. Yeh, P. S. Chau, and G. Pitner, "An adaptive PAM-4 5-Gb/s backplane transceiver in 0.25-/spl mu/m CMOS," IEEE J. Solid-State Circuits, vol. 38, pp. 436-443, Mar. 2003.
6. Y. Hur et al., "4-PAM/20 Gbps transmission over 20-in FR-4 backplane channels: Channel characterization and system implementation," presented at the IMAPS Advanced Technology Workshop, Palo Alto, CA, Oct. 2003.
7. M. Maeng et al., "A 0.18 μm CMOS equalizer with an improved multiplier for 4-PAM/20 Gbps throughput over 20-inch FR-4 backplane channels," presented at the IEEE Int. Microwave Symp., June 2004, Tu5A-2.
8. B. Wedding, W. Pöhlmann, D. Schlump, E. Schlag, and R. Ballentin, "SiGe circuits for high bit-rate optical transmission systems," in Proc. IEEE Int. Symp. Circuits and Systems, vol. 2, May-June 1999, pp. 492-495.
9. J. L. Zerbe et al., "Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM/4-PAM backplane transceiver cell'," IEEE J. Solid-State Circuits, vol. 38, pp. 2121-2130, Dec. 2003.
10. E. Lee and D. Messerschmitt, Digital Communication. Boston, MA: Kluwer, 1994.
11. F. Krummenacher and N. Joehl, "A 4-Mhz CMOS continuous-time filter with on-chip automatic tuning," IEEE J. Solid-State Circuits, vol. 23, pp. 750-758, June 1988.