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Volumn 1, Issue , 2004, Pages 105-108
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A 0.18um CMOS equalizer with a improved multiplier for 4-PAM/20Gbps throughput over 20-inch FR-4 backplane channels
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Author keywords
[No Author keywords available]
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Indexed keywords
LADDER TOPOLOGIES;
MULTI-MODE FIBER (MMF);
PARASITIC DEMANDS;
ADDERS;
COMPUTER ARCHITECTURE;
DIELECTRIC MATERIALS;
ELECTRIC INDUCTORS;
ELECTRON MULTIPLIERS;
INTERCONNECTION NETWORKS;
LADDER NETWORKS;
MATHEMATICAL MODELS;
SIMULATORS;
TOPOLOGY;
CMOS INTEGRATED CIRCUITS;
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EID: 4444237551
PISSN: 0149645X
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (12)
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References (5)
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