Charge pump circuits: Power consumption optimization-a summary

IEEE Circuits and Systems Magazine

Volumn 4, Issue 3, 2004, Pages 26-29

  Palumbo, Gaetano ^a   Pappalardo, Domenico ^b   Gaibotti, Maurizio ^b  

^a UNIVERSITY OF CATANIA   (Italy)

^b STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE PUMP CIRCUITS; PARASITIC CAPACITANCE; POWER CONSUMPTION; POWER EFFICIENCY;

CAPACITORS; CMOS INTEGRATED CIRCUITS; DIODES; ELECTRIC POWER SYSTEMS; MATHEMATICAL MODELS; OPTIMIZATION; SILICON; THRESHOLD VOLTAGE; TOPOLOGY;

CHARGE COUPLED DEVICES;

EID: 5444239228     PISSN: 1531636X     EISSN: None     Source Type: Journal    
DOI: 10.1109/MCAS.2004.1337808     Document Type: Article

References (12)

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