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Volumn , Issue , 2008, Pages 1441-1444

Reference frame access optimization for ultra high resolution H.264/AVC decoding

Author keywords

[No Author keywords available]

Indexed keywords

DECODING; DYNAMIC RANDOM ACCESS STORAGE; ELECTRIC FILTERS; EXHIBITIONS; MOTION COMPENSATION; MOTION PICTURE EXPERTS GROUP STANDARDS;

EID: 54049137308     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICME.2008.4607716     Document Type: Conference Paper
Times cited : (10)

References (6)
  • 1
    • 54049150239 scopus 로고    scopus 로고
    • Joint Video Team (JVT) of ISO/IEC MPEG and ITU-T VCEG, Draft ITU-T recommendation and final draft international standard of joint video specification ITU-T Rec. H.264/ISO/IEC 14496-10 AVC, JVT-G050, May 2003.
    • Joint Video Team (JVT) of ISO/IEC MPEG and ITU-T VCEG, "Draft ITU-T recommendation and final draft international standard of joint video specification (ITU-T Rec. H.264/ISO/IEC 14496-10 AVC," JVT-G050, May 2003.
  • 3
    • 34250713318 scopus 로고    scopus 로고
    • High Performance and High Efficiency Memory Management System for H.264/AVC Application in the Dual-Core Platform
    • Oct
    • N. R. Zhang, M Li, Y. Y. Li, W. C. Wu, "High Performance and High Efficiency Memory Management System for H.264/AVC Application in the Dual-Core Platform," in Proc. SICE-ICASE, pp. 5719-5722, Oct. 2006.
    • (2006) Proc. SICE-ICASE , pp. 5719-5722
    • Zhang, N.R.1    Li, M.2    Li, Y.Y.3    Wu, W.C.4
  • 4
    • 0000906881 scopus 로고    scopus 로고
    • High performance and cost effective memory architecture for an HDTV decoder LSI, in
    • Mar
    • T. Takizawa, J. Tajime, H. Harasaki, "High performance and cost effective memory architecture for an HDTV decoder LSI," in Proc. ICASSP, vol. 4, pp. 1981-1984, Mar. 1999.
    • (1999) Proc. ICASSP , vol.4 , pp. 1981-1984
    • Takizawa, T.1    Tajime, J.2    Harasaki, H.3
  • 5
    • 0035435834 scopus 로고    scopus 로고
    • An Efficient Memory Arbitration Algorithm for A Single Chip MPEG-2 AV Decoder
    • Aug
    • T. Takizawa, M. Hirasawa, "An Efficient Memory Arbitration Algorithm for A Single Chip MPEG-2 AV Decoder," IEEE trans. on Consumer Electronics, vol. 47, no. 3, pp. 660-665, Aug. 2001.
    • (2001) IEEE trans. on Consumer Electronics , vol.47 , Issue.3 , pp. 660-665
    • Takizawa, T.1    Hirasawa, M.2
  • 6
    • 34247559269 scopus 로고    scopus 로고
    • An Efficient Reference Frame Storage Scheme for H.264 HDTV Decoder, in Proc
    • July
    • P. Zhang, W. Gao, D. Wu, D. Xie, "An Efficient Reference Frame Storage Scheme for H.264 HDTV Decoder," in Proc. ICME, pp. 361-364, July 2006.
    • (2006) ICME , pp. 361-364
    • Zhang, P.1    Gao, W.2    Wu, D.3    Xie, D.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.