Exploring DRAM cache architectures for CMP server platforms

2007 IEEE International Conference on Computer Design, ICCD 2007

Volumn , Issue , 2007, Pages 55-62

  Zhao, Li ^a   Iyer, Ravi ^a   Illikkal, Ramesh ^a   Newell, Don ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE ORGANIZATIONS; CMP ARCHITECTURES; COMPUTER DESIGNS; CORE PROCESSORS; DUAL CORES; HIGH-BANDWIDTH; INTERNATIONAL CONFERENCES; LARGE CAPACITY; LOW-LATENCY; MEMORY SUB SYSTEMS; POTENTIAL BENEFITS; SERVER PLATFORMS;

DYNAMIC RANDOM ACCESS STORAGE; NANOTECHNOLOGY;

CACHE MEMORY;

EID: 52949091527     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2007.4601880     Document Type: Conference Paper

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