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Volumn , Issue , 2008, Pages 244-251

Adaptive precision neural networks for image classification

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE SYSTEMS; ARTIFICIAL INTELLIGENCE; BAR CODES; CLASSIFICATION (OF INFORMATION); IMAGE ANALYSIS; IMAGE CLASSIFICATION; VEGETATION;

EID: 51949091235     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/AHS.2008.65     Document Type: Conference Paper
Times cited : (3)

References (11)
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    • S. Hauck and T. Fry, The Chimaera Reconfigurable Functional Unit., IEEE Transactions on VLSI Systems, Vol 12, No. 2, February 2004.
    • (2004) IEEE Transactions on VLSI Systems , vol.12 , Issue.2
    • Hauck, S.1    Fry, T.2
  • 2
    • 0034187952 scopus 로고    scopus 로고
    • Morphosys, An Integrated Recon-figurable System for Data-Parallel and Computational Intensive Applications
    • May
    • H. Singh and G. LU, Morphosys, An Integrated Recon-figurable System for Data-Parallel and Computational Intensive Applications,. IEEE Transactions on Computers, Vol 49, No. 5, May 2000.
    • (2000) IEEE Transactions on Computers , vol.49 , Issue.5
    • Singh, H.1    LU, G.2
  • 3
    • 0034314477 scopus 로고    scopus 로고
    • A 1-V Heterogeneous Reconfigurable DSP IC for Wireless Baseband Digital Signal Processing
    • November
    • H. Zhang and V. Prabhu, A 1-V Heterogeneous Reconfigurable DSP IC for Wireless Baseband Digital Signal Processing,. IEEE Transactions on Solid State Circuits, Vol 35, No. 11, November 2000.
    • (2000) IEEE Transactions on Solid State Circuits , vol.35 , Issue.11
    • Zhang, H.1    Prabhu, V.2
  • 5
    • 51949118712 scopus 로고    scopus 로고
    • Xilinx Floating-Point Operator v3.0, Xilinx, Inc. Product Specification DS335, September 28, 2006.
    • "Xilinx Floating-Point Operator v3.0", Xilinx, Inc. Product Specification DS335, September 28, 2006.
  • 6
    • 26444479778 scopus 로고
    • Optimization by Simulated Annealing
    • 13 May
    • S. Kirkpatrick, C. D. Gelatt, Jr. M. P. Vecchi, Optimization by Simulated Annealing. Science, Volume 220, Number 4598, 13 May 1983,
    • (1983) Science , vol.220 , Issue.4598
    • Kirkpatrick, S.1    Gelatt Jr., C.D.2    Vecchi, M.P.3
  • 7
    • 51949085772 scopus 로고    scopus 로고
    • H. DeMuth, M. Beale, MATLAB Neural Network Toolbox version 4.0, The Mathworks, Inc, July, 2002
    • H. DeMuth, M. Beale, "MATLAB Neural Network Toolbox version 4.0", The Mathworks, Inc., July, 2002.
  • 9
    • 51949090447 scopus 로고    scopus 로고
    • FPGA Implementation of a Fully and Partially Connected MLP: Application to Automatic Speech Recognition
    • A. R. Omondi ans J. C. Rajapakse eds, Springer
    • A. Canas, E. M. Ortigosa, E. Ross and P. Ortigosa, FPGA Implementation of a Fully and Partially Connected MLP: Application to Automatic Speech Recognition,. FPGA Implementations of Neural Networks, 271-296, A. R. Omondi ans J. C. Rajapakse (eds). Springer 2006.
    • (2006) FPGA Implementations of Neural Networks , pp. 271-296
    • Canas, A.1    Ortigosa, E.M.2    Ross, E.3    Ortigosa, P.4
  • 10
    • 33846101011 scopus 로고    scopus 로고
    • The Impact of Arithmetic Representation on Implementing MLP-BP on FPGA: A Study
    • January
    • A. W. Savich, M. Moussa, S. Areibi, The Impact of Arithmetic Representation on Implementing MLP-BP on FPGA: A Study,. IEEE Transactions on Neural Networks, Vol 18, No. 1, January 2007.
    • (2007) IEEE Transactions on Neural Networks , vol.18 , Issue.1
    • Savich, A.W.1    Moussa, M.2    Areibi, S.3
  • 11
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    • A.. Himavathi, D. Anitha, A. Muthuramalingam, Feedforward Neural Network Implementation in FPGA Using Layer Multiplexing for Effective Resource Utilization,. IEEE Transactions on Neural Networks, 18, No. 3, May 2007.
    • A.. Himavathi, D. Anitha, A. Muthuramalingam, Feedforward Neural Network Implementation in FPGA Using Layer Multiplexing for Effective Resource Utilization,. IEEE Transactions on Neural Networks, Vol 18, No. 3, May 2007.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.