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Volumn , Issue , 2008, Pages 563-566
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Improved RF-performance of sub-micron CMOS transistors by asymmetrically fingered device layout
a
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Author keywords
Asymmetrical layout; Current density; Fingered layout; RF CMOS; Wiring capacitance
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Indexed keywords
CMOS INTEGRATED CIRCUITS;
DIGITAL INTEGRATED CIRCUITS;
ELECTRONICS INDUSTRY;
METALS;
MOSFET DEVICES;
OPTICAL DESIGN;
RADIO WAVES;
TRANSISTORS;
ASYMMETRICAL LAYOUT;
CHANNEL WIDTH;
CMOS TRANSISTORS;
CURRENT DENSITY;
DEVICE CURRENTS;
DEVICE LAYOUT;
DIGITAL CMOS TECHNOLOGY;
FINGERED LAYOUT;
METAL STACKS;
MOS TRANSISTORS;
MULTI-FINGER LAYOUTS;
OSCILLATION FREQUENCIES;
RADIO FREQUENCY INTEGRATED CIRCUITS;
RF APPLICATIONS;
RF CMOS;
RING OSCILLATORS;
SUB MICRONS;
TRANSISTOR PERFORMANCE;
WIRING CAPACITANCE;
INTEGRATED CIRCUITS;
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EID: 51849093567
PISSN: 15292517
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/RFIC.2008.4561500 Document Type: Conference Paper |
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Times cited : (5)
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References (5)
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