Input adapter based BiCMOS operational amplifier with rail-to-rail capability

"2008 26th International Conference on Microelectronics, Proceedings, MIEL 2008"

Volumn , Issue , 2008, Pages 403-406

  Tadić, Nikša ^a   Banjević, Mirjana ^b   Schloegl, Franz ^a   Zimmermann, Horst ^a  

^a VIENNA UNIVERSITY OF TECHNOLOGY   (Austria)

^b UNIVERSITY OF MONTENEGRO   (Montenegro)

Author keywords

[No Author keywords available]

Indexed keywords

BANDPASS AMPLIFIERS; BICMOS TECHNOLOGY; COMPUTER NETWORKS; DIFFERENTIAL AMPLIFIERS; MICROELECTRONICS; OPERATIONAL AMPLIFIERS;

RAIL-TO-RAIL;

AMPLIFIERS (ELECTRONIC);

EID: 51749124481     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICMEL.2008.4559306     Document Type: Conference Paper

References (12)

1. A. L. Coban, P. E. Allen, and X. Shi, "Low-voltage analog IC design in CMOS technology," IEEE Trans. Circuits and Systems, part I, vol. 42, pp. 955-958, November 1995.
2. K. Nagaraj, "Constant transconductance CMOS amplifier input stage with rail-to-rail input common mode voltage range," IEEE Trans. Circuits and Systems, part II, vol. 42, pp. 366-368, May 1995.
3. R. Hogervorst, J. P. Tero, R. G. H. Eschauzier, and J. H. Huijsing, "A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries," IEEE J. Solid-State Circuits, vol. 29, pp. 1505-1513, December 1994.
4. m rail-to-rail CMOS op-amp input stage with overlapped transition regions," IEEE J. Solid-State Circuits, vol. 34, pp. 148-156, February 1999.
5. B. J. Blalock, P. E. Allen, and G. Rincon-Mora, "Designing 1-V op amps using standard digital CMOS technology," IEEE Trans. Circuits and Systems, part II, vol. 45, pp. 769-780, July 1998.
6. J. M. Carrillo, G. Torelli, R. Perez-Aloe, and J. F. Duque-Carrillo, "1-V rail-to-rail CMOS opamp with improved bulk-driven input stage", IEEE J. Solid-State Circuits, vol. 42, pp. 508-517, March 2007.
7. R. Griffith, R. L. Vyne, R. N. Dotson, and T. Petty, "A 1 V BiCMOS rail-to-rail amplifier with n-channel depletion mode input stage," IEEE J. Solid-State Circuits, vol 32, pp. 2012-2022, December 1997.
8. T. Stockstad, and H. Yoshizawa, "A 0.9-V 0.5-μA rail-to-rail CMOS operational amplifier," IEEE J. Solid-State Circuits, vol. 37, pp. 286-292, March 2002.
9. J. F. Duque-Carrillo, J. L. Ausin, G. Torreli, J. M. Valverde, and M. A. Dominguez, "1-V rail-to-rail operational amplifiers in standard CMOS technology," IEEE J. Solid-State Circuits, vol. 35, pp. 33-44, January 2000.
10. J. Ramirez-Angulo, R. G. Carvajal, J. Tombs, and A. Torralba, "Low-voltage CMOS op-amp wit rail-to-rail input and output signal swing for continuous-time signal processing using multiple-input floating-gate transistors," IEEE Trans. Circuits and Systems, part II, vol. 48, pp. 111-116, January 2001.
11. m fluctuation," IEEE Trans. Circuits and Systems, part I, vol. 52, pp. 271-282, February 2005.
12. D. Baez-Villegas, and J. Silva-Martinez, "Quasi rail-to-rail very low-voltage OPAMP with a single pMOS input differential pair," IEEE Trans. Circuits and Systems, part II, vol. 53, pp. 1175-1179, November 2006.