Power-saving nano-scale DRAMs with an adaptive refreshing clock generator

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2008, Pages 612-615

  Tsai, Tung Han ^a,b   Chen, Chin Lin ^b   Lee, Ching Li ^b   Wang, Chua Chin ^a,b  

^a IEEE

^b NATIONAL SUN YAT SEN UNIVERSITY   (Taiwan)

Author keywords

Adaptive refreshing circuitry; DRAM; Voltage comparator

Indexed keywords

CLOCKS; DESIGN; LEAKAGE CURRENTS; SEMICONDUCTOR STORAGE; TECHNICAL PRESENTATIONS;

ADAPTIVE REFRESHING CIRCUITRY; DRAM; INTERNATIONAL SYMPOSIUM; MEMORY CELLS; VOLTAGE COMPARATOR;

PROCESS ENGINEERING;

EID: 51749084649     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2008.4541492     Document Type: Conference Paper

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