FPGA-Optimised high-quality uniform random number generators

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2008, Pages 235-244

  Thomas, David Barrie ^a   Luk, Wayne ^a  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

Random number generation

Indexed keywords

CLOCK DISTRIBUTION NETWORK; CLOCK RATE; CLOCK SPEED; CONSTRUCTION METHOD; HIGH QUALITY; LOOK UP TABLE; OPTERON; PLATFORM INDEPENDENT; RANDOM NUMBER GENERATORS; STATISTICAL QUALITY; VHDL DESCRIPTION;

CLOCKS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; DISTRIBUTED PARAMETER NETWORKS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); LOGIC GATES; NUMBER THEORY; RANDOM ACCESS STORAGE; SHIFT REGISTERS;

RANDOM NUMBER GENERATION;

EID: 51649125568     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1344671.1344706     Document Type: Conference Paper

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