A power and temperature aware DRAM architecture

Proceedings - Design Automation Conference

Volumn , Issue , 2008, Pages 878-883

  Liu, Song ^a   Memik, Seda Ogrenci ^a   Zhang, Yu ^a   Memik, Gokhan ^a  

^a Northwestern University   (United States)

Author keywords

DRAM; Page Hit Aware Write Buffer; Power; Temperature

Indexed keywords

ARSENIC COMPOUNDS; COMPUTER AIDED DESIGN; COMPUTER NETWORKS; DIGITAL INTEGRATED CIRCUITS; HIGH PERFORMANCE LIQUID CHROMATOGRAPHY; INDUSTRIAL ENGINEERING;

DRAM; PAGE HIT AWARE WRITE BUFFER; POWER; POWER CONSUMPTION; TEMPERATURE;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 51649100587     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DAC.2008.4555943     Document Type: Conference Paper

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