A framework for block-based timing sensitivity analysis

Proceedings - Design Automation Conference

Volumn , Issue , 2008, Pages 688-693

  Kumar, Sanjay V ^a   Kashyap, Chandramouli V ^b   Sapatnekar, Sachin S ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

^b INTEL CORPORATION   (United States)

Author keywords

Arrival times; Pruning; Reordering; Slacks; Variations

Indexed keywords

ARRIVAL TIMES; PRUNING; REORDERING; SLACKS; VARIATIONS;

COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; INDUSTRIAL ENGINEERING; MICROPROCESSOR CHIPS; TIME MEASUREMENT;

SENSITIVITY ANALYSIS;

EID: 51549092578     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DAC.2008.4555907     Document Type: Conference Paper

References (7)

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