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Volumn , Issue , 2007, Pages 969-972

32 nm node Ultralow-k(k=2.1)/Cu damascene multilevel interconnect using high-porosity (50 %) high-modulus (9 GPa) self-assembled porous silica

Author keywords

[No Author keywords available]

Indexed keywords

ADSORPTION; ANNEALING; COPPER; ELECTRON DEVICES; HARDENING; NANOTECHNOLOGY; POROUS MATERIALS; SILANES; SILICA; SILICATE MINERALS; SILICON COMPOUNDS; TECHNOLOGY;

EID: 50249095654     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2007.4419115     Document Type: Conference Paper
Times cited : (18)

References (5)
  • 2
    • 50249159493 scopus 로고    scopus 로고
    • T. Kikkawa et al., Tech. Dig. IEDM2005, p.99 (2005)
    • (2005) Tech. Dig , vol.IEDM2005 , pp. 99
    • Kikkawa, T.1
  • 4
    • 28744453409 scopus 로고    scopus 로고
    • R. Yagi et al., Tech. Dig. Symp. VLSI Tech., p.146 (2005)
    • R. Yagi et al., Tech. Dig. Symp. VLSI Tech., p.146 (2005)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.