A 1.2V 4.5mW 10b 100MS/s pipeline ADC in a 65nm CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 51, Issue , 2008, Pages

  Boulemnakher, Mounir ^a   Andre, Eric ^a   Roux, Jocelyn ^a   Paillardet, Frederic ^a  

^a STMICROELECTRONICS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

MULTICARRIER MODULATION; PIPELINES;

CMOS PROCESSING; INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE; PIPELINE ADC; PIPELINED ADC;

NETWORKS (CIRCUITS);

EID: 49549117124     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523151     Document Type: Conference Paper

References (5)

1. B. Hernes, A. Briskemyr, T. N. Andersen, et al., "A 1.2V 220MS/s 10b Pipeline ADC Implementated in 0.13μm Digital CMOS," ISSCC Dig. Tech. Papers, pp 256-257, Feb. 2004.
2. R. Wang, K. Martin, D. Johns, and G. Burra, "A 3.3mW 12MS/s 10b Pipelined ADC in 90nm Digital CMOS," ISSCC Dig. Tech. Papers, pp 278-279, Feb. 2005.
3. M. Yoshioka, M. Kudo, K. Gotoh, and Y. Watanabe, "A 10b 125MS/s 40mW Pipelined ADC in 0.18μm CMOS," ISSCC Dig. Tech. Papers, pp 282-283, Feb. 2005.
4. G. Geelen, E. Paulus, D. Simanjuntak, et al., "A 90nm CMOS 1.2 V 10b Power and Speed Programmable Pipelined ADC with 0.5pJ/conversionstep," ISSCC Dig. Tech. Papers, pp 214-215, Feb. 2006.
5. K. Honda, M. Furuta, S. Kawahito "A Low-Power Low-Voltage 10-bit 100-MS/s Pipeline A/D Converter Using Capacitance Coupling Techniques," IEEE J. Solid-state circuit, vol. 42, no. 4, pp. 757-765, Apr. 2007.