Drain read disturb assessment of NOR flash memory

International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Volumn , Issue , 2008, Pages 83-84

  Lee, Yung Huei ^a   Mielke, Neal ^a   McMahon, William ^a   Lu, Yin Lung R ^a   Meng, Qingru ^a   Jiang, Linda ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC MATERIALS; ERROR STATISTICS; PROCESS ENGINEERING; SECURITY SYSTEMS; TECHNOLOGY; TIMING CIRCUITS;

ERROR MODELING; INTERNATIONAL SYMPOSIUM; INTRINSIC RELIABILITY; MLC OPERATION; NOR FLASH; NOR FLASH MEMORY; PROCESS IMPROVEMENTS; READ DISTURB; VLSI TECHNOLOGIES; VOLTAGE DEPENDENCE;

FLASH MEMORY;

EID: 49049108114     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTSA.2008.4530809     Document Type: Conference Paper

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