Read disturb in flash memories: reliability case

Microelectronics Reliability

Volumn 46, Issue 9-11, 2006, Pages 1439-1444

  Tanduo, P ^a   Cola, L ^a   Testa, S ^a   Menchise, M ^a   Mervic, A ^a  

^a STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

DEFECTS; ELECTRON IRRADIATION; EXTRAPOLATION; FAILURE ANALYSIS; LEAKAGE CURRENTS; PROBABILITY; RELIABILITY; STATISTICAL METHODS;

CELL FAILURE DENSITY (CDF); ELECTRON INJECTION; STRESS-INDUCED LEAKAGE CURRENT (SILC); TUNNEL OXIDE;

PROM;

EID: 33747809629     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2006.07.007     Document Type: Article

References (20)

1. Crisenza G., Clementi C., Ghidini G., and Tosi M. Floating Gate Memories Reliability. Quality and Reliability Engineering International 8 (1992)
2. Cappelletti P, Modelli A. "Flash Memory Reliability". ESSDERC 1998.
3. Belgal H.P., Righos N., Kalastirsky I., Peterson J.J., Shiner R., and Mielke N. A New Reliability Model for Post-Cycling Charge Retention of Flash Memories. IEEE (2002)
4. Brand A., Wu K., Pan S., and Chin D. Novel Read Disturb Failure Mechanism Induced by Flash Cycling. IEEE IRPS (1993)
5. 2 Films. IEEE Transactions On Electron Devices (1998)
6. De Blauwe J, Van Houdt J. et al. "SILC-Related Effects in Flash EEPROM". IEEE Transactions On Electron Devices 1998.
7. Satoh S, Hemink G. et al. "Stress Induced Leakage Current of Tunnel Oxide Derived from Flash Memory Read Disturb Characteristics". IEEE Transactions On Electron Devices 1998.
8. Hemink G.J., Shimizu K., Aritome S., and Shirota R. Trapped Hole Enhanced Stress Induced Leakage Currents in NAND EEPROM Tunnel Oxides. IEEE IRPS (1996)
9. Chen IC, Choi JY, Hu C. et al. "The Effect of the Channel Hot Carrier Stressing on Gate Oxide Integrity in MOSFET". IEEE IRPS 1988.
10. Cappelletti P., Bez R., Cantarelli D., and Fratin L. Failure Mechanism of Flash Cell in Program/Erase Cycles. IEDM Technical Digest (IEEE) (1993)
11. Pavan P, Bez R, Olivo P, Zanoni E."Flash Memory Cells- An Overview". Proceedings of the IEEE 1997.
12. Tam S, Ko PK, Hu C, et al. "Correlation between Substrate and Gate Currents in MOSFET's". IEEE Transactions On Electron Devices 1982.
13. 2. Journal of Applied Physics (1969)
14. Bez R, Cantarelli D, Moioli L, et al. "A New Erasing Method for a Single- Voltage Long-Endurance Flash Memory". IEEE Electron Devices Letters 1998.
15. Dunn C, Kaya C, Lewis T, et al. "Flash EPROM Disturb Mechanism". IEEE IRPS, 1994.
16. Yamada S, Amemiya K. et al. "Non Uniform Current Flow through Thin Oxide after Fowler-Nordheim Current Stress. IEEE IRPS 1996.
17. Ong TC, fazio A, Mielke N. et alii "Erratic Erase in ETOX Flash Menory Array". IEDM Technical Digest 1993.
18. Arai F., Maruyama T., and Shirota R. Extended Data Retention Process Technology for Highly Reliable Flash EEPROMs. IEEE IRPS (1998)
19. Teramoto A, Kobayashi K, et alii "Excess Current Induced by Hot Hole Injection and F-N Stress in Thin SiO 2 Films". IEEE IRPS 1996.
20. Olivo P., Nguyen T., and Riccò B. High Field Induced Degradation in Ultrathin SiO 2 films. IEEE Transactions On Electron Devices (1988)