Adaptive burn-in time decision system based on pattern recognition for intelligent reliability control

Expert Systems with Applications

Volumn 35, Issue 4, 2008, Pages 1688-1697

  Lee, Jang Hee ^a   Park, Jae Whan ^b  

^a Korea University of Technology and Education   (South Korea)

^b Chung Ang University   (South Korea)

Author keywords

Agent; Burn in test; Pattern recognition; Self Organizing Map

Indexed keywords

ADAPTIVE CONTROL SYSTEMS; BINS; CHLORINE COMPOUNDS; CONFORMAL MAPPING; ELECTRIC CONDUCTIVITY; FEATURE EXTRACTION; FINANCIAL DATA PROCESSING; KETONES; MAPS; NEURAL NETWORKS; PATTERN RECOGNITION; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICES; SEMICONDUCTOR MATERIALS; SEMICONDUCTOR SWITCHES; SOFTWARE PROTOTYPING;

AGENT; ALTERNATIVE APPROACH; BURN-IN; BURN-IN TEST; BURN-IN TESTING; BURN-IN TIME; DECISION SYSTEMS; DEFECTIVE CHIPS; MULTI AGENTS; ON-TIME DELIVERY; OPTIMAL BURN-IN TIME; PRODUCTION PROCESSES; REAL DATA; REAL-WORLD; RELIABILITY LEVELS; SELF-ORGANIZING MAP; SELF-ORGANIZING MAPS; SEMICONDUCTOR COMPANIES; WAFER BIN-MAP;

PATTERN RECOGNITION SYSTEMS;

EID: 48949098603     PISSN: 09574174     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.eswa.2007.08.079     Document Type: Article

References (15)

1. Bergman B. On reliability theory and its applications. Scandinavian Journal of Statistics 12 (1985) 1-30
2. Bergman B., and Klefsjo B. Burn-in methods and TTT-Transforms. Quality and Reliability Engineering International 1 (1985) 125-130
3. Chen T.M., and Yassine A.M. Electrical noise and VLSI interconnect reliability. IEEE Transactions on Electron Devices 41 (1994) 2165-2172
4. Fayyad U., Piatetssky-Shapiro G., Smyth P., and Uthurusamy R. Advances in knowledge discovery and data mining (1996), AAA Press/MIT Press, California
5. Kohonen T. Self-organization & associative memory. 3rd ed. (1989), Springer-Verlag, Berlin
6. Kuo W., and Kuo Y. Facing the headaches early failures: A state-of-the-art review of burn-in decisions. Proceedings of IEEE 71 II (1983) 1257-1266
7. Kuper F., van der Pol J., Ooms E., Johnson T., Wijburg R., Koster W., et al. Relation between yield and reliability of integrated circuits: Experimental results and application to continuous early failure rate reduction programs. IRPS (1996) 17-21
8. Leemis L.M., and Beneke M. Burn-in models and methods: A review. IIE Transactions June (1990) 172-180
9. Mi J. Minimizing some cost functions related to both burn-in and field use. Operational Research 44 (1996) 497-500
10. Nguyenand D.G., and Murthy D.N.P. Optimum burn-in time to minimize cost for products sold under warranty. IEEE Transactions on Reliability 14 5 (1982) 167-174
11. Palma F.D., Nicolao G.D., Miraglia G., Pasquinetti E., and Piccinini F. Unsupervised spatial pattern classification of electrical-wafer-sorting maps in semiconductor manufacturing. Pattern Recognition Letters 26 12 (2005) 1857-1865
12. Pierce D.G., and Brusius P.G. Electromigration: A review. Microelectronics Reliability 37 (1997) 1053-1072
13. Stewart L., and Johnson J.D. Determining optimum burn-in and replacement time using Bayesian decision theory. IEEE Transactions on Reliability R-21 3 (1972) 170-175
14. van der Pol, J., Kuper, F., & Ooms, E. (1996). Relation between yield and reliability of integrated circuits and application to failure rate assessment and reduction in the one digit FIT and PPM reliability era. In Proceedings of the 7th european symposium on reliability of electron devices, failure physics, and analysis (pp. 1603-1610).
15. Wang H. Intelligent agent-assisted decision support systems: Integration of knowledge discovery. Expert Systems with Applications 12 3 (1997) 323-336