A novel open-loop high-speed CMOS sample-and-hold

AEU - International Journal of Electronics and Communications

Volumn 62, Issue 8, 2008, Pages 588-596

  Mousazadeh, Morteza ^a   Hadidi, Khayrollah ^a   Khoei, Abdollah ^a  

^a URMIA UNIVERSITY   (Iran)

Author keywords

ADC; Charge injection; Linearity; Sample and hold

Indexed keywords

ACOUSTIC INTENSITY; ANALOG TO DIGITAL CONVERSION; CHARGE INJECTION; SPEED;

ADC; BOTTOM-PLATE SAMPLING; HIGH SPEEDS; LINEARITY; OPEN LOOPS; SAMPLE AND HOLD; SIMULATION RESULTS;

SIGNAL TO NOISE RATIO;

EID: 48449093116     PISSN: 14348411     EISSN: 16180399     Source Type: Journal    
DOI: 10.1016/j.aeue.2007.08.003     Document Type: Article

References (6)

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4. Hadidi K, Sobhi J, Hasankhan A, Muramatsu D, Matsumoto T. A novel highly linear cmos buffer. The 5th IEEE international conference on electronics, circuit and systems, Lisbon, Portugal, 1998, pp. 369-71.
5. Razavi B. Principles of data conversion system design (1995), IEEE Press
6. Hadidi K, Sasaki M, Watanabe T, Muramatsu D, Matsumoto T. An open-loop full cmos 103 mhz -61 db thd s/h circuit. The IEEE custom integrated circuits conference, Santa Clara, USA, 1998, pp. 381-3.