Dicing die attach film for 3D stacked die QFN packages

Proceedings of the IEEE/CPMT International Electronics Manufacturing Technology (IEMT) Symposium

Volumn , Issue , 2007, Pages 73-75

  Abdullah, S ^a   Mohd Yusof, S ^b   Ahmad, I ^a   Jalar, A ^a   Daud, R ^a  

^a UNIVERSITI KEBANGSAAN MALAYSIA   (Malaysia)

^b AIC Semiconductor Sdn Bhd   (Malaysia)

Author keywords

Dicing process; Die attach film; Laminating process; SEM; Stacked die

Indexed keywords

CHIP SCALE PACKAGES; CRYSTAL WHISKERS; ELECTRIC CURRENTS; ELECTRONIC EQUIPMENT MANUFACTURE; ELECTRONICS PACKAGING; LAMINATING; MERGING; SPEED; TECHNOLOGY; THREE DIMENSIONAL;

BOND LINES; CRITICAL PARAMETERS; DICING PROCESS; DIE ATTACH; DIE ATTACH FILM; DIE ATTACH PROCESS; ELECTRONICS MANUFACTURING; GRIT SIZE; HIGH POWERS; LAMINATING PROCESS; LAMINATION PARAMETERS; LAMINATION PROCESS; PARAMETER COMBINATION; PARAMETER SETTINGS; QFN PACKAGING; QUALITATIVE ANALYSIS; REAL ESTATES; SAW SPEED; SEM; SEMICONDUCTOR PACKAGING; SPINDLE ROTATION; STACKED DIE; STACKED DIE PACKAGES; THREE DIMENSIONAL (3D); TWO TYPES; WHISKER FORMATION;

DIES;

EID: 48149103695     PISSN: 10898190     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEMT.2007.4417054     Document Type: Conference Paper

References (6)

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