Complex shaped on-wafer interconnects modeling for CMOS RFICs

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 16, Issue 7, 2008, Pages 922-926

  Shi, Xiaomeng ^a   Yeo, Kiat Seng ^a   Ma, Jian Guo ^b   Do, Manh Anh ^a   Li, Erping ^c  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA   (China)

^c INSTITUTE OF HIGH PERFORMANCE COMPUTING   (Singapore)

Author keywords

CMOS radio frequency integrated circuits (RFICs); Equivalent circuit model; Interconnects; On wafer measurements

Indexed keywords

COMPUTER AIDED DESIGN; INTERCONNECTION NETWORKS;

ELECTRONIC-DESIGN-AUTOMATION (EDA) TOOLS; EMPIRICAL EXPRESSIONS; MODEL DEVELOPMENT; ON-WAFER INTERCONNECTS; ON-WAFER MEASUREMENTS;

ELECTRONICS ENGINEERING;

EID: 48149100941     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2008.2000445     Document Type: Article

References (7)

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