-
1
-
-
47849097845
-
Middlefield Rd., Mountain View, CA94043, USA, COSSAP
-
Synopsys Inc, 700 E
-
Synopsys Inc., 700 E. Middlefield Rd., Mountain View, CA94043, USA, COSSAP User's Manual
-
User's Manual
-
-
-
3
-
-
0029210375
-
-
J. Pino, S. Ha, E. A. Lee, and J. T. Buck, Software Synthesis for DSP Using Ptolemy, Journal of VLSI Signal Processing 9 pp 7-21 Jan. 1995
-
J. Pino, S. Ha, E. A. Lee, and J. T. Buck, "Software Synthesis for DSP Using Ptolemy", Journal of VLSI Signal Processing Vol. 9 pp 7-21 Jan. 1995
-
-
-
-
4
-
-
0023138886
-
Static scheduling of synchronous dataflow programs for digital signal processing
-
Jan
-
E. A. Lee and D. G. Messerschmitt, "Static scheduling of synchronous dataflow programs for digital signal processing," IEEE Trans. Computer, vol. C-36, pp. 24-35, Jan. 1987
-
(1987)
IEEE Trans. Computer
, vol.C-36
, pp. 24-35
-
-
Lee, E.A.1
Messerschmitt, D.G.2
-
5
-
-
0027542932
-
A Compile-Time Scheduling Heuristic for Interconnection-Constrained Heterogeneous Processor Architectures
-
Feb
-
G. C. Sih and E. A. Lee, "A Compile-Time Scheduling Heuristic for Interconnection-Constrained Heterogeneous Processor Architectures," IEEE Trans. parallel and distributed systems, vol 4, no.2, pp. 175-187, Feb. 1993.
-
(1993)
IEEE Trans. parallel and distributed systems
, vol.4
, Issue.2
, pp. 175-187
-
-
Sih, G.C.1
Lee, E.A.2
-
6
-
-
85015134903
-
A Hierarchical Multiprocessor Scheduling System for DSP Applications
-
Oct
-
J. Pino, S. S. Bhatacharyya, and E. A. Lee, "A Hierarchical Multiprocessor Scheduling System for DSP Applications," in Proc. of Intl. Conf. Signals, Systems and Computers, vol. 1, pp. 122-126, Oct. 1995
-
(1995)
Proc. of Intl. Conf. Signals, Systems and Computers
, vol.1
, pp. 122-126
-
-
Pino, J.1
Bhatacharyya, S.S.2
Lee, E.A.3
-
7
-
-
0036042342
-
Hardware-Software Cosynthesis of Multi-Mode Multi-Task Embedded Systems with Real-Time Constraints
-
May
-
H. Oh and S. Ha, "Hardware-Software Cosynthesis of Multi-Mode Multi-Task Embedded Systems with Real-Time Constraints," CODES, May 2002
-
(2002)
CODES
-
-
Oh, H.1
Ha, S.2
-
8
-
-
0030081339
-
Cyclo-Static Dataflow
-
Feb
-
G. Bilsen, M. Engles, R. Lauwereins, and J. A. Peperstraete, "Cyclo-Static Dataflow," IEEE Trans. Signal Processing, vol. 44, no. 2, Feb. 2001
-
(2001)
IEEE Trans. Signal Processing
, vol.44
, Issue.2
-
-
Bilsen, G.1
Engles, M.2
Lauwereins, R.3
Peperstraete, J.A.4
-
9
-
-
0035284165
-
Extended Synchronous Dataflow for Efficient DSP System Prototyping
-
Kluwer Academic Publishers Mar
-
C. Park, J. Chung, and S. Ha, "Extended Synchronous Dataflow for Efficient DSP System Prototyping", Design Automation for Embedded Systems, Kluwer Academic Publishers Vol. 3, pp. 295-322, Mar. 2002
-
(2002)
Design Automation for Embedded Systems
, vol.3
, pp. 295-322
-
-
Park, C.1
Chung, J.2
Ha, S.3
-
10
-
-
1842639024
-
Fractional rate dataflow model for efficient code synthesis
-
May
-
H. Oh and S. Ha, "Fractional rate dataflow model for efficient code synthesis", Journal of VLSI Signal Processing Vol. 37, pp. 41-51, May 2004
-
(2004)
Journal of VLSI Signal Processing
, vol.37
, pp. 41-51
-
-
Oh, H.1
Ha, S.2
-
11
-
-
0030857755
-
APGAN and RPMC: Complementary Heuristics for Translating DSP Block Diagrams into Efficient Software Implementations
-
Jan
-
S. S. Bhattacharyya, P. K. Murthy, and E. A. Lee, "APGAN and RPMC: Complementary Heuristics for Translating DSP Block Diagrams into Efficient Software Implementations", DAES, vol. 2, no. 1, pp. 33-60, Jan. 1997
-
(1997)
DAES
, vol.2
, Issue.1
, pp. 33-60
-
-
Bhattacharyya, S.S.1
Murthy, P.K.2
Lee, E.A.3
-
12
-
-
0028996809
-
Scheduling for Optimum Data Memory Compaction in Block Diagram Oriented Software Synthesis
-
S. Ritz, M. Willems, H. Meyr, "Scheduling for Optimum Data Memory Compaction in Block Diagram Oriented Software Synthesis", in Proc. of Intl. Conf. on Acoustics, Speech, and Signal Processing, pp. 2651-2653, 1995
-
(1995)
Proc. of Intl. Conf. on Acoustics, Speech, and Signal Processing
, pp. 2651-2653
-
-
Ritz, S.1
Willems, M.2
Meyr, H.3
-
13
-
-
0037870809
-
Memory-optimized Software Synthesis from Dataflow Program Graphs with Large Size Data Samples
-
May
-
H. Oh and S. Ha, "Memory-optimized Software Synthesis from Dataflow Program Graphs with Large Size Data Samples", EURASIP Journal on Applied Signal Processing Vol. 2003 pp 514-529, May 2003
-
(2003)
EURASIP Journal on Applied Signal Processing
, vol.2003
, pp. 514-529
-
-
Oh, H.1
Ha, S.2
-
14
-
-
0027152911
-
Representing and Exploiting Data Parallelism Using Multidimensional Dataflow Diagrams
-
Apr
-
E. A. Lee, "Representing and Exploiting Data Parallelism Using Multidimensional Dataflow Diagrams," in Proc. of Intl. Conf. on Acoustics, Speech, and Signal Processing, Vol. 1, pp 453-456, Apr. 1993.
-
(1993)
Proc. of Intl. Conf. on Acoustics, Speech, and Signal Processing
, vol.1
, pp. 453-456
-
-
Lee, E.A.1
-
15
-
-
4544247305
-
Systematic Exploitation of DSP applications
-
May
-
M. Sen and S. S. Bhattacharyya, "Systematic Exploitation of DSP applications," in Proc. of Intl. Conf. on Acoustics, Speech, and Signal Processing, Vol. 5, pp. 229-232, May 2004.
-
(2004)
Proc. of Intl. Conf. on Acoustics, Speech, and Signal Processing
, vol.5
, pp. 229-232
-
-
Sen, M.1
Bhattacharyya, S.S.2
-
16
-
-
33847310410
-
Hardware-Software Cosynthesis of Multitask MPSoCs with Real-Time Constraints
-
Oct
-
C. Lee and S. Ha, "Hardware-Software Cosynthesis of Multitask MPSoCs with Real-Time Constraints", in Proc. of Intl. Conf. on ASIC, Oct. 2005
-
(2005)
Proc. of Intl. Conf. on ASIC
-
-
Lee, C.1
Ha, S.2
|