A framework for automated and optimized ASIP implementation supporting multiple hardware description languages

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 1, Issue , 2005, Pages 280-285

  Schliebusch, Oliver ^a   Chattopadhyay, A ^a   Kammler, D ^a   Ascheid, G ^a   Leupers, R ^a   Meyr, H ^a   Kogel, Tim ^b  

^a RWTH AACHEN UNIVERSITY   (Germany)

^b CoWare Inc ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURE; AUTOMATION; COMPUTER AIDED DESIGN; HIGH LEVEL LANGUAGES; SYSTEMS ANALYSIS;

APPLICATION SPECIFIC INSTRUCTION SET PROCESSOR; ARCHITECTURE DESCRIPTION LANGUAGES; DESIGN SPACE EXPLORATION; HARDWARE DESCRIPTIONS; HIGH-LEVEL OPTIMIZATIONS; INTERMEDIATE REPRESENTATIONS; LANGUAGE INDEPENDENTS; REGISTER TRANSFER LEVEL;

COMPUTER HARDWARE DESCRIPTION LANGUAGES;

EID: 47849085698     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1120725.1120850     Document Type: Conference Paper

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