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Volumn , Issue , 2006, Pages

A cellular active contours algorithm based on region evolution

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ARTIFICIAL INTELLIGENCE; BOOLEAN FUNCTIONS; LEAST SQUARES APPROXIMATIONS; NEURAL NETWORKS; PIXELS; REAL TIME CONTROL;

EID: 47549083109     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CNNA.2006.341643     Document Type: Conference Paper
Times cited : (16)

References (13)
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  • 4
    • 0033340805 scopus 로고    scopus 로고
    • Computing with Front Propagation: Active Contour and Skeleton Models in Continuous-Time CNN
    • Cs. Rekeczky and L.O. Chua, Computing with Front Propagation: Active Contour and Skeleton Models in Continuous-Time CNN. Journal of VLSI Signal Processing Systems, 23(2/3), pp. 373-402, 1999.
    • (1999) Journal of VLSI Signal Processing Systems , vol.23 , Issue.2-3 , pp. 373-402
    • Rekeczky, C.1    Chua, L.O.2
  • 5
    • 13444301087 scopus 로고    scopus 로고
    • D.L. Vilariño and Cs. Rekeczky. Pixel Level Snakes on the CNNUM: Algorithm Design, On-chip Implementation and Applications . Int. Journal of Circuit Theory and Applications, 33, pp. 17-51, 2005.
    • D.L. Vilariño and Cs. Rekeczky. Pixel Level Snakes on the CNNUM: Algorithm Design, On-chip Implementation and Applications . Int. Journal of Circuit Theory and Applications, 33, pp. 17-51, 2005.
  • 6
    • 33645288565 scopus 로고    scopus 로고
    • Topographic Cellular Active Contour Techniques: Theory, Implementations and Comparisons
    • D. Hillier, V. Binzberger, D.L. Vilariño and Cs. Rekeczky. Topographic Cellular Active Contour Techniques: Theory, Implementations and Comparisons, Int. J. of Circ. Theory and Appl., 34, pp. 183-216, 2006.
    • (2006) Int. J. of Circ. Theory and Appl , vol.34 , pp. 183-216
    • Hillier, D.1    Binzberger, V.2    Vilariño, D.L.3    Rekeczky, C.4
  • 7
    • 33746359807 scopus 로고    scopus 로고
    • Accuracy and Efficiency of Grey-level Image Filtering on VLSI Cellular Processor Arrays
    • July
    • P.Dudek, "Accuracy and Efficiency of Grey-level Image Filtering on VLSI Cellular Processor Arrays", CNNA 2004, pp.123-128, July 2004
    • (2004) CNNA 2004 , pp. 123-128
    • Dudek, P.1
  • 8
    • 27144438303 scopus 로고    scopus 로고
    • Fast and Efficient Implementation of Trigger-Wave Propagation on VLSI Cellular Processor Arrays
    • July
    • P.Dudek, "Fast and Efficient Implementation of Trigger-Wave Propagation on VLSI Cellular Processor Arrays", CNNA 2004, pp.117-122, July 2004
    • (2004) CNNA 2004 , pp. 117-122
    • Dudek, P.1
  • 9
    • 33646866538 scopus 로고    scopus 로고
    • An Asynchronous Cellular Logic Network for Trigger-Wave Image Processing on Fine-Grain Massively Parallel Arrays
    • May
    • P.Dudek, "An Asynchronous Cellular Logic Network for Trigger-Wave Image Processing on Fine-Grain Massively Parallel Arrays", IEEE Trans. on Circuits and Systems, vol. 53, no.5, pp. 354-358, May 2006
    • (2006) IEEE Trans. on Circuits and Systems , vol.53 , Issue.5 , pp. 354-358
    • Dudek, P.1
  • 10
    • 33745071610 scopus 로고    scopus 로고
    • A General-Purpose 128×128 SIMD Processor Array with Integrated Image Sensor
    • June
    • P.Dudek and S.J.Carey, "A General-Purpose 128×128 SIMD Processor Array with Integrated Image Sensor", Electronics Letters, vol.42, no.12, pp.678-679, June 2006
    • (2006) Electronics Letters , vol.42 , Issue.12 , pp. 678-679
    • Dudek, P.1    Carey, S.J.2
  • 11
    • 34547275970 scopus 로고    scopus 로고
    • Architecture of a VLSI cellular processor array for synchronous/asynchronous image processing
    • A.Lopich and P.Dudek, "Architecture of a VLSI cellular processor array for synchronous/asynchronous image processing" IEEE International Symposium on Circuits and Systems, ISCAS 2006, pp.3618-3621
    • (2006) IEEE International Symposium on Circuits and Systems, ISCAS , pp. 3618-3621
    • Lopich, A.1    Dudek, P.2
  • 12
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    • M.Ishikawa et. al. A CMOS Vision Chip with SIMD Processing Element Array for 1ms Image Processing, Proc. ISSCC'99, TP 12.2, 1999.
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  • 13
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    • Architectural and Basic Circuit Considerations for a Flexible 128×128 Mixed-Signal SIMD Vision Chip
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.