Circuit level verification of a high-speed toggle

Proceedings - Formal Methods in Computer Aided Design, FMCAD 2007

Volumn , Issue , 2007, Pages 199-206

  Yan, Chao ^a   Greenstreet, Mark R ^a  

^a UNIVERSITY OF BRITISH COLUMBIA   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT LEVEL (CL); CONTINUOUS MODELING; DIGITAL DESIGNS; DIMENSIONAL MODEL; FEATURE SIZES; HIGH SPEEDS; IDEAL SWITCHES; LINEAR APPROXIMATIONS; NON-LINEAR CIRCUITS; NON-LINEAR DYNAMICS; NUMERICAL ERRORS; STANDARD-CELL LIBRARIES; TOGGLE FLIP FLOP (T FF); VLSI FABRICATION;

ARSENIC COMPOUNDS; COMPUTER AIDED DESIGN; DIGITAL ARITHMETIC; DIGITAL INTEGRATED CIRCUITS; DIGITAL LIBRARIES; EIGENVALUES AND EIGENFUNCTIONS; ELECTRIC BATTERIES; ERROR ANALYSIS; FLIP FLOP CIRCUITS; FORMAL METHODS; LINEAR PROGRAMMING; NETWORKS (CIRCUITS); OPTICAL DESIGN; PROJECTION SYSTEMS; SPEED; STANDARDS;

DIGITAL CIRCUITS;

EID: 47349119894     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FAMCAD.2007.39     Document Type: Conference Paper

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