An Efficient FPGA Implementation of Gaussian Mixture Models-Based Classifier Using Distributed Arithmetic

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn , Issue , 2006, Pages 1276-1279

  Shi, Minghua ^a   Bermak, A ^a   Chandrasekaran, S ^b   Amira, A ^b  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

^b BRUNEL UNIVERSITY   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; CLASSIFICATION (OF INFORMATION); CLASSIFIERS; COMMUNICATION CHANNELS (INFORMATION THEORY); DATA STORAGE EQUIPMENT; FEATURE EXTRACTION; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FILTER BANKS; HARDWARE; LEARNING SYSTEMS; MAGNETOSTRICTIVE DEVICES; NETWORKS (CIRCUITS); OBJECT RECOGNITION; PATTERN RECOGNITION; TRELLIS CODES;

CELOXICA (CO); COMPACT CORE; COMPLEX PROCESSING; DIGITAL HARDWARE IMPLEMENTATION; DISTRIBUTED ARITHMETIC (DA); FPGA IMPLEMENTATIONS; GAUSSIAN MIXTURE MODEL (GMM); GAUSSIAN MIXTURE MODELS (GMMS); HARDWARE COMPLEXITIES; INTERNATIONAL CONFERENCES; PERFORMANCE METRICS; PIECEWISE APPROXIMATION; PLACEMENT AND ROUTING;

DIGITAL ARITHMETIC;

EID: 47349089959     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2006.379695     Document Type: Conference Paper

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