A new methodology for interconnect parasitics extraction considering photo-lithography effects

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2007, Pages 450-455

  Zhou, Ying ^a   Li, Zhuo ^b,c   Tian, Yuxin ^a   Shi, Weiping ^a   Liu, Frank ^c  

^a TEXAS A AND M UNIVERSITY   (United States)

^b Pextra Corporation   (United States)

^c IBM AUSTIN RESEARCH LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN AUTOMATION CONFERENCE (DAC); DESIGN FLOWS; EXPERIMENTAL RESULTS; FAST ALGORITHMS; INTERCONNECT PARASITICS; PARASITIC EXTRACTION; PARASITICS; RESOLUTION ENHANCEMENT TECHNIQUES (RET); SIGNAL INTEGRITY ANALYSIS; SOUTH PACIFIC; SUB-WAVELENGTH LITHOGRAPHY; TIMING VERIFICATION;

COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; EXTRACTION; GEOMETRY; HETEROJUNCTION BIPOLAR TRANSISTORS; INDUSTRIAL ENGINEERING; LITHOGRAPHY; MECHANIZATION; OPTICAL DESIGN; PHOTOACOUSTIC EFFECT; QUALITY ASSURANCE; RELIABILITY; SIGNAL PROCESSING;

ERROR ANALYSIS;

EID: 46649113753     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2007.358027     Document Type: Conference Paper

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