Sleepy keeper: A new approach to low-leakage power VLSI design

IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip

Volumn , Issue , 2006, Pages 367-372

  Kim, Se Hun ^a   Mooney III, Vincent J ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; ELECTRIC POWER UTILIZATION; INTEGRATED CIRCUITS; LSI CIRCUITS; PROGRAMMABLE LOGIC CONTROLLERS; TRANSISTORS; VLSI CIRCUITS;

CIRCUIT DESIGNERS; FEATURE SIZES; INTERNATIONAL CONFERENCES; LEAKAGE POWER; NEW APPROACHES; NOVE L APPROACH; SLEEP MODES; SLEEP TRANSISTORS; SYSTEM ON CHIP (SOCS); TOTAL POWER CONSUMPTION; VERY LARGE SCALE INTEGRATION (VLSI); VLSI DESIGNS;

LEAKAGE CURRENTS;

EID: 46249129610     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSISOC.2006.313263     Document Type: Conference Paper

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