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Volumn PART 1, Issue , 2006, Pages 348-351
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Multiplane virtual channel router for network-on-chip design
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Author keywords
Network on chip; Virtual channel router
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Indexed keywords
COMMUNICATION;
COMPUTER ARCHITECTURE;
ELECTRIC NETWORK TOPOLOGY;
INTEGRATED CIRCUITS;
NETWORK ARCHITECTURE;
SWITCHES;
THROUGHPUT;
ALLOCATOR;
BUS-BASED COMMUNICATION;
COMMUNICATION BAND WIDTH;
CROSSBAR SWITCHING;
HARDWARE COMPLEXITIES;
IN ORDER;
INTERNATIONAL CONFERENCES;
LATENCY PERFORMANCE;
NETWORK-ON-CHIP (NOC);
NETWORK-ON-CHIP (NOC) DESIGN;
THROUGHPUT PERFORMANCE;
VIRTUAL CHANNELS;
ROUTERS;
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EID: 46249102743
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/CCE.2006.350796 Document Type: Conference Paper |
Times cited : (9)
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References (8)
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