Design and fabrication of MOSFETs with a reverse embedded SiGe (Rev. e-SiGe) structure

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2006, Pages

  Donaton, Ricardo A ^a   Chidambarrao, Dureseti ^a   Johnson, Jeff ^a   Chang, Paul ^a   Yaocheng, Liu ^a   Henson, W Kirklen ^a   Holt, Judson ^a   Xi, Li ^a   Jinghong, Li ^a   Domenicucci, Anthony ^a   Madan, Anita ^a   Rim, Ken ^a   Wann, Clement ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BI-LAYER STRUCTURES; CONTROL DEVICES; DRIVE CURRENTS; MOBILITY ENHANCEMENT; MOSFETS; N-MOSFET; NOVEL DEVICES; SIGE/SI; STRAIN RESULTS;

CRYSTALLOGRAPHY; ELECTRON DEVICES; MOSFET DEVICES; OPTICAL DESIGN; SEMICONDUCTING GERMANIUM COMPOUNDS; SILICON; SILICON ALLOYS;

TENSILE STRAIN;

EID: 46049090047     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2006.346813     Document Type: Conference Paper

References (6)

1. J. Hoyt, et al., "Strained Silicon MOSFET technology," IEEE IEDM, p.23, 2002.
2. 2 SRAM cell," IEEE IEDM, p.61, 2002.
3. D. Chanemougame, et al., "Performance boost of scaled Si PMOS through novel SiGe stress for HP CMOS," 2005 Symposium on VLSI Technology Digest of Technical Papers, p. 180, 2005.
4. K. Ususda, T. Numata, and S. Takagi, "Strain evaluation of strained-Si layers on SiGe by the nano-beam electron diffraction (NBD) method," Mat. Sci. in Semiconductor. Processing. (8), p. 155, 2005.
5. K. Rim, S. Narasimha, M. Longstreet, A. Mocuta, and J. Cai, "Low field mobility characteristics of sub-100 nm unstrained and strained Si MOSFETs," IEEE IEDM, p.43, 2002.
6. M.Horstmann, et al., "Integration and optimization of embeddedSiGe, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies," IEEE IEDM, p.243, 2005