Reduced parameter fluctuation with laser and flash lamp anneal for 65nm volume production

ECS Transactions

Volumn 6, Issue 1, 2007, Pages 373-380

  Feudel, Th ^a   Bayha, B ^a   Burbach, G ^a   Gerhardt, M ^a   Herrmann, L ^a   Herden, M ^a   Mantei, T ^a   Ehrichs, E ^a   Greenlaw, D ^a   Horstmann, M ^a  

^a IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; LOGIC GATES;

ADVANCED ANNEALING TECHNIQUE; ANNEAL TEMPERATURES; CMOS LOGIC CIRCUITS; FLASH LAMP ANNEAL; PARAMETER FLUCTUATIONS; PROCESS PARAMETERS; TRANSISTOR GATE LENGTH; TRANSISTOR PERFORMANCE;

COMPUTER CIRCUITS;

EID: 45849136387     PISSN: 19385862     EISSN: 19386737     Source Type: Conference Proceeding    
DOI: 10.1149/1.2727422     Document Type: Conference Paper

References (6)

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