A highly integrated analog baseband transceiver featuring a 12-bit 180MSPS pipelined A/D converter for multi-channel wireless LAN

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue CIRCUITS SYMP., 2004, Pages 428-431

  Gulati, Kush ^a   Muñoz, Carlos ^a   Cho, Seonghwan ^a   Manganaro, Gabriele ^a   Lugin, Mike ^a   Peng, Mark ^a   Pulincherry, Anurag ^a   Li, Jipeng ^a   Bugeja, Alex ^a   Chandrakasan, Anantha ^a   Shoemaker, David ^a  

^a Engim Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; ELECTRIC CONVERTERS; ENERGY UTILIZATION; KNOWLEDGE ACQUISITION; LOCAL AREA NETWORKS; MICROPROCESSOR CHIPS; SIGNAL DISTORTION; SIGNAL TO NOISE RATIO; TRANSCEIVERS;

BASEBAND TRANSCEIVERS; DIGITAL BUFFERS; LOW-POWER MODES; WIRELESS LAN;

WIRELESS TELECOMMUNICATION SYSTEMS;

EID: 4544363329     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. G. Manganaro, S.U. Kwak and A.R. Bugeja, "A Dual 10b 200MSPS Pipeline D/A Converter with DLL-Based Clock Synthesizer," Custom Integrated Circuits Conf., Sep., 2001
2. W. Yang, D. Kelly, I. Mehr, M.T. Sayuk, and L. Singer, "A 3V 340mW 14b 75Msample/s CMOS ADC with 85-dB SFDR at Nyquist Input," IEEE J. of Solid-State Circuits, Vol. 36, Dec., 2001
3. B. Ginetti, P.G.A. Jespers, and A. Vandemeulebroecke, "A CMOS 13-b cyclic RSD A/D Converter," IEEE J. of Solid-State Circuits, Vol. 27, July 1992
4. L. Singer, S. Ho, M. Timko and D. Kelly, "A 12b 65MSamples/s CMOS ADC with 82dB SFDR at 120MHz," ISSCC 2000