A formal concurrency model based architecture description language for synthesis of software development tools

Proceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES)

Volumn , Issue , 2004, Pages 47-56

  Qin, Wei ^a   Rajagopalan, Subramanian ^a   Malik, Sharad ^a  

^a Princeton University   (United States)

Author keywords

Design; Languages; Verification

Indexed keywords

ARCHITECTURE DESCRIPTION LANGUAGES (ADL); NEUMANN COMPUTERS; NON-RECURRING ENGINEERING (NRE); OPERATION STATE MACHINE (OSM);

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; DATA COMMUNICATION SYSTEMS; INTEGER PROGRAMMING; LINEAR PROGRAMMING; OPTIMIZATION; PROGRAM PROCESSORS; RESOURCE ALLOCATION; SEMANTICS; SHRINKAGE;

SOFTWARE ENGINEERING;

EID: 4544349390     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (18)

1. H. Akaboshi. A Study on Design Support for Computer Architecture Design. PhD thesis, Department of Information Systems, Kyushu University, Japan, 1996.
2. A. Appel and L. George. Optimal spilling for CISC machines with few registers. In Proceedings of the Conference on Programming Language Design and Implementation, 2000.
3. T. Austin, E. Larson, and D. Ernst. Simplescalar: An infrastructure for computer system modeling. IEEE Computer, pages 59-67, Feb 2002.
4. A. Fauth, J. V. Praet, and M. Freericks. Describing instructions set processors using nML. In Proceedings of Conference on Design Automation and Test in Europe, pages 503-507, Paris, France, 1995.
5. R. Fourer, D. Gay, and B. Kernighan. AMPL: A Modeling Language for Mathematical Programming. Duxbury Press, 2002.
6. Fujitsu Limited. Hiperion II - Digital Signal Processor User's Manual, 1998.
7. G. Hadjiyiannis, S. Hanono, and S. Devadas. ISDL: An instruction set description language for retargetability. In Proceedings of Design Automation Conference, pages 299-302, June 1997.
8. A. Halambi, P. Grun, V. Ganesh, A. Khare, N. Dutt, and A. Nicolau. EXPRESSION: A language for architecture exploration through compiler/simulator retargetability. In Proceedings of Conference on Design Automation and Test in Europe, pages 485-490, 1999.
9. C. Lee, M. Potkonjak, and W. H. Mangione-Smith. MediaBench: A tool for evaluating and synthesizing multimedia and communicatons systems. In International Symposium on Microarchitecture, pages 330-335, 1997.
10. R. B. Lee and A. M. Fiskiran. PLX: A fully subword-parallel instruction set architecture for fast scalable multimedia processing. In Proceedings of the 2002 IEEE International Conference on Multimedia and Expo (ICME 2002), pages 117-120, August 2002.
11. P. Mishra, N. Dutt, and A. Nicolau. Functional abstraction driven design space exploration of heterogeneous programmable architectures. In Proceedings of the International Symposium on System Synthesis, Oct 2001.
12. S. Pees, A. Hoffmann, V. Zivojnovic, and H. Meyr, LISA - machine description language for cycle-accurate models of programmable DSP architectures. In Proceedings of Design Automation Conference, pages 933-938, 1999.
13. W. Qin. http://www.ee.princeton.edu/MESCAL/madl.html, 2004.
14. W. Qin and S. Malik. Flexible and formal modeling of microprocessors with application to retargetable simulation. In Proceedings of Conference on Design Automation and Test in Europe, pages 556-561, 2003.
15. S. Rajagopalan, M. Vacharajani, and S. Malik. Handling irregular ILP within conventional VLIW schedulers using artificial resource constraints. In International Conference on Compilers, Architectures and Synthesis for Embedded Systems, 2000.
16. Target Compiler Technologies N.V. http://www.retraget.com, 2004.
17. O. Wahlen, M. Hohenauer, and R. Leupers. Instruction scheduler generation for retargetable compilation. IEEE Design & Test of Computers, 20(1):34-41, Jan 2003.
18. G. Zimmerman. The MIMOLA design system: A computer-aided processor design method. In Proceedings of Design Automation Conference, pages 53-58, June 1979.