Stochastic modeling based environment for synthesis and comparison of bus arbitration policies

Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging Trends in VLSI Systems Design

Volumn , Issue , 2004, Pages 199-204

  Kallakuri, Sankalp ^a   Doboli, Alex ^a   Doboli, Simona ^b  

^a USA   (United States)

^b HOFSTRA UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUS ARBITRATION POLICIES; DETERMINISTIC POLICIES; NETWORK PROCESSOR; STOCHASTIC MODELING;

COMPUTER SIMULATION; COMPUTER SYSTEM RECOVERY; CONSTRAINT THEORY; DATA ACQUISITION; HEURISTIC METHODS; MARKOV PROCESSES; PARAMETER ESTIMATION; SCHEDULING;

RANDOM PROCESSES;

EID: 4544349381     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2004.1339530     Document Type: Conference Paper

References (12)

1. E.A.Feinberg, "Constrained Semi-Markov Decision Processes with Average Rewards", ZOR- Mathematical Methods of Operational Research, Vol.39,1994,pp. 257-288.
2. E.A.Feinberg, "Optimal Control of Average Reward Constrained Continuous Time Finite Markov Decision Processes", Proceedings of IEEE 2002 Conference on Decisions and Control Las Vegas, December 10-13, 2002, pp. 3805-3810.
3. Q. Qiu, Q.Wu, M.Pedram, "Stochastic Modeling of a Power-Managed System: Construction and Optimisation", IEEE Transactions on Computer Aided Design,Vol.20, no.9, Oct2001, pp. 1200-1217.
4. Q.Qiu, Q.Wu, M.Pedram, "Dynamic Power Management of Complex Systems Using Generalised Stochastic Petri Nets", Proceedings of the 37th Design Automation Conference, June 2000, pp. 352-356.
5. Q.Qiu, M.Pedram, "Dynamic Power Management Based on Continuous time Markov Decision processes", Proceedings of the Design Automation Conference, June 1999, pp. 555-561.
6. G.A.Palegolo, L.Benini, A.Bogliolo, G.De Micheli, "Policy Optimisation for Dynamic Power Management", Proceedings of the Design Automation Conference, June 1998, pp. 182-187.
7. Eui-Young Chung, L.Benini, A.Bogliolo, G.de Micheli, "Dynamic Power Management for non-stationary service requests", Proceedings of the Design Automation and Test in Europe, March 1999, pp. 77-81.
8. T. G. Robertazzi, "Computer Networks and Systems: Queueing Theory and Performance Evaluation", Springer-Verlag, 2000.
9. J.A.Darringer et at,"Early analysis tools for System-on-a-chip design", IBM Journal of Research and Development,Vol.46,No.6,November 2002,pp. 691-707.
10. N. Thepayasuwan, V. Damle, A. Doboli, "Bus Architecture Synthesis for Hardware-Software Co-Design for Deep Submicron Systems on Chip", International Conference on Computer Design(ICCD) 2003, San Jose,CA.
11. N. Thepayasuwan, A. Doboli, "Layout Conscious Bus Architecture Synthesis for Deep Submicron Systems on Chip", accepted for publication, Design, Automation and Test in Europe Conference (DATE) 2004, Paris.
12. W.Wolf,"An Architectural Co-Synthesis Algorithm for Distributed, Embedded Computing Systems", IEEE Transcations on VLSI Systems, June 1997, pp. 218-229.