RTP-grown oxynitride layers meet gate challenges

Semiconductor International

Volumn 27, Issue 10, 2004, Pages 73-80

  Chung, H Y A ^a   Niess, J ^a   Dietl, W ^a   Roters, G ^a   Ilerch, W ^a   Nenyei, Z ^a   Ludsteck, A ^b   Schulze, J ^b   Eisele, I ^b   Wieczorek, K ^c   Krumm, N ^c  

^a Mattson Thermal Products GmbH   (Germany)

^b BUNDESWEHR UNIVERSITY MUNICH   (Germany)

^c IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CHEMICAL VAPOR DEPOSITION; DIELECTRIC DEVICES; DIFFUSION; DOPING (ADDITIVES); ELECTRIC PROPERTIES; INFORMATION TECHNOLOGY; MOSFET DEVICES; OXIDES; POLYSILICON; SEMICONDUCTOR DEVICES; THICKNESS MEASUREMENT;

EQUIVALENT OXIDE THICKNESS (EOT); GATE DIELECTRIC; OXYNITRIDE; RAPID THERMAL NITRIDATION (RTN);

THIN FILMS;

EID: 4544279843     PISSN: 01633767     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Review

References (10)

1. 2 and Si-O-N Gate Dielectric Layers for Silicon Microelectronics: Understanding the Processing, Structure, and Physical and Electrical Limits," J. Appl. Phys., 2001, p. 2057.
2. I. Eisele, et al.,"Growth Modes and Characterization of Thin RTF Silicon Oxides," 10th IEEE International Conference on Advanced Thermal Processing of Semiconductors - RTF, 2002, p. 11.
3. J.R. Brews,"Rapid Interface Parameterization Using a Single MOS Conductance Curve," Solid-State Electronics, August 1983, p. 711.
4. 2/Si," Proc. of Int. Symposium on Silicon Nitride and Silicon Dioxide Thin Insulating Films, 2003, p. 308.
5. P. Hoffmann, et al.,"Non-Destructive Probing of Interfacial Oxidation and Nitridation States at RTP Si-Oxides," Thin Solid Films, March 2003, p. 216.
6. K. Muraoka, et al.,"Optimum Structure of Deposited Ultra-Thin Silicon Oxynitride Film to Minimize Leakage Current," Proc. of Int. Symposium on Silicon Nitride and Silicon Dioxide Thin Insulating Films, 2003, p. 418.
7. M. Bidaud, et al.,"Decoupled Plasma Nitridation of Ultra-Thin Gate Oxides for 60-90 nm Technologies," Proc. of Int. Symposium on Silicon Nitride and Silicon Dioxide Thin Insulating Films, 2003, p. 517.
8. Y. Kataoka and M.Shigeno,"Depth Profiling of Nitrogen in Ultra-Thin Gate Dielectrics Using Low-Energy Oxygen Bombardment," Abstracts SIMS XIV Conf., 2003, p. 92.
9. Maul et al., to be published.
10. P.M. Zeitzoff,"MOSFET and Front-End Process Integration: Scaling, Challenges, and Potential Solutions Through the End of the Roadmap," Stanford University, Hot Chip Conference, 2002, p. 28.