A comparative analysis of parallel delta-sigma ADC architectures

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 51, Issue 3, 2004, Pages 450-458

  Eshraghi, Aria ^a   Fiez, Terri S ^b  

^a SILICON LABORATORIES   (United States)

^b Oregon State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; COMMUNICATION CHANNELS (INFORMATION THEORY); DIGITAL FILTERS; DISCRETE FOURIER TRANSFORMS; INTEGRATED CIRCUIT LAYOUT; MATRIX ALGEBRA; MODULATION;

DELTA SIGMA CONVERTER; NYQUIST RATE ADC; PARALLEL DELTA SIGMA CONVERTER; RANDOMIZATION; TIME INTERLEAVED ADC;

DELTA SIGMA MODULATION;

EID: 4544221546     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2004.823663     Document Type: Article

References (22)

1. Y. Tamba and K. Yamakido, "A CMOS 6 b 500 Msample/s ADC for hard disk drive read channel," in Proc. Int. Solid-State Circuits Conf., Feb. 1999, pp. 324-325.
2. B. Brandt and J. Lutsky, "A 75 mW 10 b 20 Msample/s CMOS subranging ADC with 59 dB SNDR," in Proc. Int. Solid-State Circuits Conf., Feb. 1999, pp. 322-3.
3. D. Fu, S. Lewis, and P. Hurst, "Digital backgound calibration of a 10 b 40 MS/s parallel pipelined ADC," in Proc. Int. Solid-State Circuits Conf., Feb. 1998, pp. 140-141.
4. C. Conroy and P. R. Gray, "An 8 b 85-Msample/s parallel pipeline A/D converter in 1 μm CMOS," IEEE J. Solid-State Circuits, vol. 28, pp. 447-454, Feb. 1994.
5. T. Fiez and A. Eshraghi, "Delta-sigma A/D converters: The next generation," in Proc. IEEE 40th Midwest Symp. Circuits and Systems, vol. 1, Aug. 1997, pp. 181-184.
6. R. F. Cormier, "Wideband analog to digital conversion using bandpass Sigma-Delta modulator and multirate digital filter bank," Masters thesis, Washington State Univ., Pullman, 1994.
7. R. F. Cormier Jr, T. L. Sculley, and R. H. Bamberger, "Combining subband decomposition and sigma-delta modulation for wideband A/D conversion," in Proc. 1994 IEEE Int. Symp. Circuits and Systems, May 1994, pp. 5.357-360.
8. R. F. Cormier Jr, "A fourth order bandpass delta-sigma modulator with digitally programmable passband frequency," Analog Integr. Circuits Signal Processing, vol. 12, no. 3, pp. 217-229, 1997.
9. E. T. King, A. Eshraghi, I. Galton, and T. S. Fiez, "A Nyquist-rate delta-sigma A/D converter," IEEE J. Solid-State Circuits, vol. 33, pp. 45-52, Jan. 1998.
10. A. Eshraghi and T. Fiez, "A comparison of three parallel ΔΣ A/D converters," in Proc. IEEE Int. Symp. Circuit and Systems, May 1996, pp. 517-520.
11. I. Galton and H. T. Jensen, "Delta-sigma based A/D conversion without oversampling," IEEE Trans. Circuits Syst. II, vol. 42, pp. 773-784, Dec. 1995.
12. I. Galton, "Analog-to-digital converter using parallel ΔΣ modulators," U.S. Patent 196 852, 1993.
13. E. King, "Design Considerations for the ΔΣ Converter without oversampling," Master's thesis, Washington State Univ., Pullman, 1993.
14. E. King, F. Aram, T. Fiez, and I. Galton, "Parallel delta-sigma A/D conversion," in Proc. IEEE Custom Integrated Circuits Conf., May 1994, pp. 23.3.1-23.3.4.
15. A. Eshraghi and T. S. Fiez, "An area efficient time-interleaved parallel delta-sigma A/D converter," in Proc. IEEE Int. Symp. Circuits and Systems, vol. 1, May 1998, Paper WPA 10-6, pp. I.591-I.595.
16. A. Eshraghi and T. Fiez, "A time-interleaved delta-sigma A/D converter," IEEE Trans. Circuits Syst. II, vol. 50, pp. 118-129, Mar. 2003.
17. R. Koini-Poorfard, L. B. Lim, and D. A. Johns, "Time interleaved oversampling A/D converters: Theory and practice," IEEE Trans. Circuits Syst. II, vol. 44, pp. 634-645, Aug. 1997.
18. M. Kozak, M. Karaman, and I. Kale, "Efficient architectures for time interleaved oversampling data converters," IEEE Trans. Circuits Syst. II, vol. 47, pp. 802-810, Aug. 2000.
19. M. Kozak and I. Kale, "Novel architectures for time interleaved oversampling data converters," IEEE Trans. Circuits Syst. II, vol. 47, pp. 639-654, July 2000.
20. R. Schreier and M. Snelgrove, "Bandpass sigma-delta modulation," Electron. Lett., vol. 25, no. 23, pp. 1560-1561, 1998.
21. A. Eshraghi, "High-speed parallel delta-sigma analog-to-digital converters," Ph.D. dissertation, Dept. Elect. Eng., Washington State Univ., Pullman, 1999.
22. R. D. Batten, A. Eshraghi, and T. S. Fiez, "Calibration of parallel Delta-Sigma ADCs," IEEE Trans. Circuits Syst. II, vol. 49, pp. 390-399, June 2002.