Efficient architectures for time-interleaved oversampling delta-sigma converters

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 47, Issue 8, 2000, Pages 802-810

  Kozak, Mücahit ^a   Karaman, Mustafa ^b   Kale, Izzet ^a  

^a Applied DSP and VLSI Research Group   (United Kingdom)

^b BASKENT UNIVERSITY   (Turkey)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; COMPUTATIONAL COMPLEXITY; COMPUTER AIDED NETWORK ANALYSIS; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; ELECTRIC NETWORK SYNTHESIS; MODULATORS;

TIME-INTERLEAVED OVERSAMPLING DELTA-SIGMA CONVERTERS; WIDE-BANDWIDTH DATA CONVERTERS;

DELTA SIGMA MODULATION;

EID: 0034248854     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.861422     Document Type: Article

References (11)

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