A 312-MHz CT ΔΣ modulator using a SC feedback DAC with reduced peak current

ESSCIRC 2007 - Proceedings of the 33rd European Solid-State Circuits Conference

Volumn , Issue , 2007, Pages 240-243

  Anderson, Martin ^a   Sundström, Lars ^b  

^a LUND UNIVERSITY   (Sweden)

^b ERICSSON RESEARCH   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCKS; DELTA SIGMA MODULATION; DIGITAL INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ENERGY STORAGE; JITTER; MULTICARRIER MODULATION; NETWORKS (CIRCUITS); SILICON;

CIRCUIT PERFORMANCES; CLOCK JITTER SENSITIVITY; CLOCK PULSES; CONTINUOUS-TIME (CT); DELTA-SIGMA ADC; EUROPEAN; MAXIMUM SNR; PEAK CURRENTS; RF-CMOS; SECOND ORDERS; SOLID-STATE CIRCUITS CONFERENCE; SWITCHED CAPACITOR (SC); SWITCHED CURRENT (SI);

ANALOG TO DIGITAL CONVERSION;

EID: 44849115361     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2007.4430288     Document Type: Conference Paper

References (6)

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6. R. Schreier. (2006) The Delta-Sigma Toolbox for MATLAB. www.mathworks.com/matlabcentral/fileexchange.