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Volumn , Issue , 2007, Pages 159-162

A high bandwidth power scaleable sub-sampling 10-bit pipelined ADC with embedded sample and hold

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; ARCHITECTURAL DESIGN; EMBEDDED SYSTEMS; MULTICARRIER MODULATION;

EID: 44849098987     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2007.4430270     Document Type: Conference Paper
Times cited : (4)

References (7)
  • 1
    • 33746924092 scopus 로고    scopus 로고
    • A Highly Integrated CMOS Analog Baseband Transceiver With 180 MSPS 13-bit Pipelined CMOS ADC and Dual 12-bit DACs
    • Aug
    • K. Gulati et al, "A Highly Integrated CMOS Analog Baseband Transceiver With 180 MSPS 13-bit Pipelined CMOS ADC and Dual 12-bit DACs," IEEE Journal of Solid State Circuits, vol. 41, pp. 1856-1866, Aug. 2006
    • (2006) IEEE Journal of Solid State Circuits , vol.41 , pp. 1856-1866
    • Gulati, K.1
  • 2
    • 33746874490 scopus 로고    scopus 로고
    • A 14-bit 125 MS/s IF/RF Sampling Pipelined ADC With 100 dB SFDR and 50 fs Jitter
    • Aug
    • A A. Ali et al, "A 14-bit 125 MS/s IF/RF Sampling Pipelined ADC With 100 dB SFDR and 50 fs Jitter", IEEE Journal of Solid State Circuits, vol 41, pp. 1846-1855, Aug. 2006
    • (2006) IEEE Journal of Solid State Circuits , vol.41 , pp. 1846-1855
    • Ali, A.A.1
  • 3
    • 29044441000 scopus 로고    scopus 로고
    • A 50MS/s (35mW) to 1kS/s (15μW) power scaleable 10b Pipelined ADC Using Rapid Power On opamps and Minimal Bias Current Variation
    • Dec
    • I. Ahmed, D. Johns, "A 50MS/s (35mW) to 1kS/s (15μW) power scaleable 10b Pipelined ADC Using Rapid Power On opamps and Minimal Bias Current Variation," IEEE Journal of Solid State Circuits, vol 40, pp. 2446-2455, Dec. 2005
    • (2005) IEEE Journal of Solid State Circuits , vol.40 , pp. 2446-2455
    • Ahmed, I.1    Johns, D.2
  • 5
    • 0031641129 scopus 로고    scopus 로고
    • A 1.5 V, 10-bit, 14MS/s CMOS Pipeline analog-to-digital converter
    • June
    • AM. Abo, P.R. Gray, "A 1.5 V, 10-bit, 14MS/s CMOS Pipeline analog-to-digital converter" IEEE, VLSI Circuits, June 1998, pp. 166-169
    • (1998) IEEE, VLSI Circuits , pp. 166-169
    • Abo, A.M.1    Gray, P.R.2
  • 6
    • 0025568946 scopus 로고
    • A Fast settling CMOS Op Amp for SC Circuits with 90-dB DB Gain
    • December
    • K Bult, G.J.G.M. Geelen, "A Fast settling CMOS Op Amp for SC Circuits with 90-dB DB Gain", IEEE Journal of Solid-State Circuits, vol 25, pp.1379-1384, December 1990
    • (1990) IEEE Journal of Solid-State Circuits , vol.25 , pp. 1379-1384
    • Bult, K.1    Geelen, G.J.G.M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.