1.5 V, 10-bit, 14 MS/s CMOS pipeline analog-to-digital converter

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 1998, Pages 166-169

  Abo, Andrew M ^a   Gray, Paul R ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC POTENTIAL; MOS DEVICES; PIPELINE PROCESSING SYSTEMS; RELIABILITY; SEMICONDUCTOR SWITCHES;

BOOTSTRAPPING TECHNIQUES;

ANALOG TO DIGITAL CONVERSION;

EID: 0031641129     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)