A 64GHz 6.5dB NF 15.5dB gain LNA in 90nm CMOS

ESSCIRC 2007 - Proceedings of the 33rd European Solid-State Circuits Conference

Volumn , Issue , 2007, Pages 352-355

  Pellerano, Stefano ^a   Palaskas, Yorgos ^a   Soumyanath, Krishnamurthy ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

(100) SILICON; (P ,P ,T) MEASUREMENTS; CASCODE; CMOS TECHNOLOGIES; ELECTROMAGNETIC (EM) SIMULATIONS; EUROPEAN; MM WAVES; MM-WAVE APPLICATIONS; MODELING METHODOLOGIES; PARASITIC EXTRACTION; PEAK GAIN; SOLID-STATE CIRCUITS CONFERENCE;

ARCHITECTURAL DESIGN; COMPUTER NETWORKS; EXTRACTION; LOW NOISE AMPLIFIERS; MICROFLUIDICS; MILLIMETER WAVES; NETWORKS (CIRCUITS); SILICON; SOLVENT EXTRACTION; TECHNOLOGY; WAVE ENERGY CONVERSION; WAVES;

AUDIO FREQUENCY AMPLIFIERS;

EID: 44849083296     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2007.4430316     Document Type: Conference Paper

References (11)

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